List Of Illustrations - Tektronix 7140 Instruction Manual

7104 Instruction
IV
LIST OF ILLUSTRATIONS
FIGURE PAGE FIGURE
PAGE
NO . NO .
Frontis
piece 7104 Features . . . . . . . . . . . . : . . . . . . . . . . . . . . . . . . . x
3-20 Character selection matrix for 7104 Readout
1-1 7104 dimensional drawing . . . . . . . . . . . . . . . . . . . . 1-12
System SN 8053267 & Above . . . . . . . . . . . . . . . . 3-41
3-21 Detailed block diagram of 7104 Readout System
2-1 Front-panel controls, connectors and
SN ~053267 & Above . . . . . . . . . . . . . . . . . . . . . . . 3-44
indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
3_22 Developing a typical character on the crt
2-2
Rear-panel controls and connectors . . . . . . . . . . . . . 2-6
SN ~053267 & Above . . . . . . . . . . . . . . . . . . . . . . . 3-50
2-3
Definition of graticule measurement lines . . . . . . . . . 2-8
3_23
Theoretical timing diagrams for the Intensity
2-4
Location of readout on the crt identifying the
Limiting stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-61
originating plug-in and channel . . . . . . . . . . . . . . . . 2-10
3_24 (A) Representation of Inverter stage . Idealized
waveforms of (B) total inverter current,
h,
3-1 Basic block diagram of the 7104 Oscilloscope . . . . . 3-2
(C) voltage of CR1234 and CR1241, and (D) voltage
3-2 Breakdown of sep~rate stages within Horizontal
across primary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-68
Logic IC (4428) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10
3-3 (A) Diagram of clock generator stage ; (B) Idealized
4_1 Color code for resistors and capacitors . . . . . . . . . . 4-4
waveform for clock generator stage . . . . . . . . . . . . 3-18
q-2 Semiconductor lead configurations . . . . . . . . . . . . . . 4-5
3-4 Idealized waveforms for the Vertical Chopped
4-3 Orientation of multi-pin connectors . . . . . . . . . . . . . . 4-6
Banking IC (04320) . . . . . . . . . . . . . . . . . . . . . . . . . 3-19
4_4
Current sensing waveform at R1284 showing :
3-5
(A) Input and output pins for Chop Counter IC,
A . Power supplies not in current limit operation
04340 ; (B) Idealized waveforms for Chop Counter
B . Power supplies in current limit operation . . . . . 4-10
stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-20
4_5
Location of line shortage capacitor screws used
3-6 Logic diagram of Vertical Mode Logic stage . . . . . 3-22
for manually discharging C1216 and C1217 . . . . . . 4-10
3-7
(A) Logic diagram of Trace Separation stage ;
4-6 Typical waveforms on C1216 and C1217 with the
(B) Table of input/output combinations . . . . . . . . . . 3-23
line voltage set to about 20 volts . . . . . . . . . . . . . . 4-11
3-8 Location of readout display on the crt identifying
4_7
Current waveforms of T1230 showing burst
the originating plug-in and channel . . . . . . . . . . . . . 3-25
operation at line voltage of about 60 volts . . . . . . . 4-12
3-9 Character selection matrix for 7104 Readout
4_g
Current waveform at T1230 for normal inverter
System SN ~053266 & Below . . . . . . . . . . . . . . . . 3-26
operation at line voltage of 115 volts . . . . . . . . . . . 4-12
3-10 Typical readout display where only channel 2 of the
4_g
Waveform at TP1234 on the power-supply Inverter
Right Vertical and B Horizontal units is displayed . 3-27
board with the line voltage at about 20 volts . . . . . 4-12
3-11 Output waveforms of the Timer stage . . . . . . . . . . 3-29
4_10 Typical waveform at junction of R1811 and
3-12
Detail of output at pins 12, 13, 14 and 16 of
CR1747 on the High Voltage circuit board . . . . . . . 4-17
02126 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-29
4_11 Typical waveform at junction of R1814 and
3-13
Timer stage operation when display-skip condition
CR1816 on the High Voltage circuit board . . . . . . . 4-18
occurs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-30
4_12 Power supply unit securing screws . . . . . . . . . . . . 4-23
3-14 Timer relationship of the time-slot (TS) pulses
4-13 Location of securing screws for the A6-Main
produced by Q2159 . . . . . . . . . . . . . . . . . . . . . . . . . 3-31
Intertace board . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-27
3-15 Typical encoding scheme for voltage-sensing plug-
4-14 Correct placement of power transistor and
in unit . Coding shown for deflection factor of 100
mounting hardware on rear heat sink . . . . . . . . . . . 4-29
microvolts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-33
q_15 HYPCON assembly removal and replacement . . . . 4-32
3-16
Idealized current waveforms of (A) Row analog
4-16 Coaxial end-lead connector assembly . . . . . . . . . . 4-34
data and (B) Column analog data . . . . . . . . . . . . . . 3-34
4_17
Exploded view of circuit-board pin and ferrule . . . . 4-35
3-17
Typical output waveforms for Zeros Logic and
4_18 Removal procedure for push-button switches . . . . 4-36
Memory stage operation (at pin 7 of 02232) . . . . . 3-36
3-18 Readout word relating 10 possible character
5_1
Typical 7104 Photographic Writing Rate . . . . . . . . 5-34
locations to the decimal point instructions that can
5_2
Readout display with Q2225 removed . . . . . . . . . . 5-69
be encoded ; and the resultant crt display . . . . . . . 3-38
5_3 Typical 7104 Photographic Writing Rate . . . . . . . . 5-72
3-19 Flow chart for character generation by the
Readout System . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-38
REV NOV 1985