Sss-10 - Sony DSR-1500 Service Manual

DSR-1500 (UC) : S/N 100001 and Higher
DSR-1500 (J) : S/N 300001 and Higher
DSR-1500P (CE) : S/N 400001 and Higher
IC605,IC606
PB LTC AMP
TC IN
Q600-Q603
NTSC/PAL
EQ.CNT
TC OUT
IC604(1/2)(2/2)
REC LTC AMP
IC512(1/2),(2/2)
1
RM_TX+ 14
6
Y
RM_TX–
REMOTE 13
Z RS-422
RM_RX+ 2
TRANSCEIVER1
A
1
RM_RX–
B
9
5
10
Y
11
Z RS-422
6 TRANSCEIVER2
A
7
B
SY_SCK
MB 52-70 52-70
SY_SI
MB 52-69 52-69
SY_SO
MB 52-68
52-68
IC520
SY_SO_3V
MB 52-67 52-67
SY_SI_3V IC510
MB 52-66
52-66
H_MONITOR_OFF
MB 52-48 52-48
H_CI_RESET
51-5
MB 51-5
H_JC_RESET
MB 51-4 51-4
H_AUDIO_OUT_MUTE
MB 52-60 52-60
NSG_OE
52-56
MB 52-56
L_DV_EXIST 6
MB 51-32 51-32
IC602
7
L_SDI_EXIST
51-31
MB 51-31
D0-D7
Y1
L_DDE_EXIST 8
ı
MB 52-78 52-78
8
Y8
2
HRDY 1
MB 51-12 51-12
HRDY 2 3
MB 51-13 51-13
4
HRDY 3
MB 51-14 51-14
19 CS11
OE1
1
RD
OE2
HD0 18
MB 51-19 51-19
IC601
HD1 17
MB 51-20 51-20
HD2 16
D0-D7
MB 51-21 51-21 A1
ı
HD3 15
8
MB 51-22 51-22 A8
HD4 14
MB 51-23
51-23
HD5 13
MB 51-24 51-24
HD6 12
MB 51-25 51-25
HD7 11
MB 51-26 51-26
19
CS1 CS9
MB 51-15 51-15
OE
1 RD
CS2
DIR
MB 51-16 51-16
CS3
MB 51-17
51-17
A0
MB 51-18 51-18
WR
MB 51-10 51-10
RD
MB 51-11 51-11
C1R_MCS
MB 52-104 52-104
C1R_SCS
MB 52-103 52-103
C1P_MCS
MB 52-95 52-95
C1P_SCS
MB 52-96 52-96
DV_CS
MB 52-86
52-86
DIF_CS
MB 52-87 52-87
KY_CS
MB 52-82 52-82
NSG_CS
MB 52-57
52-57
NCG_CS
MB 52-59 52-59
RTG_STB
MB 52-80 52-80
NSG_DA_CS
MB 52-58 52-58
BANK_CNT
MB 51-44 51-44
RENT_CNT
MB 51-43 51-43
DSR-1500/1500P
LTC_DIN
H_NTSC/L_PAL
LTC_DOUT
IC501
SY/SP CPU
15
D 96
D TXD1
IC514(1/4)(2/4)
4 E1 AD0
58
DE PA7
AD15
95
3 R
SW RXD1
R
9
D
12 IC514(3/4)(4/4)
E2 60
DE PA8
5
R SW
SCK 97
SCK0
93
RXD0
94
SO
TXD0
86
WAIT
PB3
89
WRL
PB5
90
WRH
PB6
91
PB7
83
NSG_OE
PB0
IRQ7
IRQ6
IC600
IRQ5
SRAM
X500
2-10, 21
IRQ2
19.6608MHz
A0 23-25 71
EXTAL
ı
A1-A12 IRQ3
A12 13
72
XTAL
D0 11-19
ı D0-D7
8
D7
20
CS10
E
22
RD
G
27
WRL
W
PA12
PA13
TIDCA0
TIDCA1
CK
RES
IC508,IC507
IC603
IC505
CHIP SELCT
LATCH
RESET RESET
15 0 2
0 A 1Q
D0-D7
1 5
14
+5V VDD
B 2Q
1
8 OUT
2 6
13
C 3Q
2
3 9
12
4Q
D
3
15
11 6Q
S500
4
1 CS12
10
CEN
5
26
11
WRL
15
8
14
9
13
10
12 9 REN_CNT
14
11
10 FPGA-CS
11
15
12

SSS-10 (1/3)

SSS-10 (1/3)
IC519
FLASHMEMORY
1-8
16-25
A1-A9
48 A0
1-3,5-12
ı
D0-D15
19
14,16-19
A17
ı
16
29-36
D0-D15
38-45 D0
ı
16
DQ15
20-23,25-31
33-37,39-40
A0-A21
IC500
A0
42-45
IC516,IC517
ı
28
22 RD
A21
OE
WRL 11
WE
CS0 FLASH
CONT.
CS2
46 CS0 L-JIG_EXIST
CS0
JIG_RY/BY
47 CS1 15
CS1 RY/BY
CS2 12
48
CS2 RES
49 CS3
CS3
53 CS6
CS6
IC503
54 SRAM
WAIT
55 WRL
1-5,18-21
A1-A16
A0
56 WRH 24-27,42-44
ı
16
A15
57 RD
RD
100
IRQ7
7-10,13-16
99 D0-D15
IRQ6 I/O0
29-32,35-38
ı
98
IRQ5 16
I/O15
67
JIG_RY/BY
68 CS1 6
CS
H_JIG_EXIST
41
RD
OE
A0 40
BHE
39
WRH
BLE
17
WRL
WE
A16 SRAM
CONT
FPGA_DONE
IC500,IC504,IC517
65 FPGA_DONE
66 FPGA_INT
51
R-TRKT
62 P-TRKT
69 SY_SYS_CK
76
RES
IC506 IC517
INV INV
IC500
O/C
3
13-17 13-17
LTC_DIN,_OUT, NTSC/PAL 3
1
TO (2/3)
SY_L_ACD_BUS 4 WAIT
2
IRQ5-IRQ7
25
SY_ACD_BUS A0-A12,D0-D7
3
CS8,CS9,WRL,RD
TO (2/3)
30 45
IC511
IC513
BUFF
JIG_RY/BY
A0-A12 A0-A12
H_JIG_EXIST
13 13
L_JIG_EXIST
WRL WRL
D0
RD RD
D1
D2
D3
IC515
BUFF
D4
D5
D0-D7 D0-D7
D6
8 8
D7
D8
CS6
OE
D9
RD
DIR
D10
D11
D12
IC518
ADDRESS DECODER D13
A18 CS8 D14
A 0
A19 CS9 D15
B 1
A0
A20 CS10
C 2
A1
CS11
3
A2
A21 CS12
G2A 4
A3
CS6
G2B
A4
A5
A6
A7
26 A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
IC504 A18
BUFF
A19
CS0
CS3
CS2
WRH
WRL
RD
L_RESET
R-TRKT
P-TRKT
L_CPU_RESET
PLD_RESET
IC517
INV
TO (2/3)
14
4
1-6
1-7
1-8
1-9
1-10
1-11
1-12
1-13
1-14
1-15
1-16
1-17
1-18
1-19
1-20
1-21
1-22
1-23
1-24
1-25
1-26
1-27
1-28
FACTORY USE
1-29
1-30
1-31
1-32
1-33
1-34
1-35
1-36
1-37
1-38
1-39
1-40
1-41
1-42
1-43
1-44
1-45
1-46
1-47
1-48
1-49
1-50
1-5
51-35 MB 51-35
51-33 MB 51-33
51-3 MB 51-3
51-6 MB 51-6
Super Syscon/Servo
SSS-10 (1/3)
LOT NO. 072-