Power Supply; Digital Circuitry; Cpu Block Diagram; Memory Mapping - Keithley 776 Instruction Manual

Programmable counter/timer
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Theory
of
Operation
6-3-6.
Power Supply
For the following discussions, refer to the power supply
schematic at the end of the manual. The power supply is
made up of a line fuse, power on-off switch, line voltage
selection switch, power transformer, two bridge rectifiers.
two monolithic regulators, and hvo discrete regulators
which is formed by U52, 430, 431, Q32, Q39, and their
associated
components.
Fuse F1 is the LINE FUSE which is accessible on the rear
panel. S2 is the LINE VOLTAGE SELECT switch, which
is accessible on the rear panel, to select 115 V or 230 V
operation and Sl is the power on-off switch. CR25 is used
as a full-wave rectifier to provide a sufficient DC voltage
for the +I2 V, and -12 V regulators U50, and U51 respec-
tivdy.
U52b receives a reference voltage of +5 V from the +I 2
V supply. This reference is then compared to the regulated
+5 V U52b then controls through Q30 the current through
the series pass transistor - 43 1. The +5 V supply then acts
as the reference for the -5.2 V regulated supply. The opera-
tion of U52a is similar to the operation of US2b, except,
US2a operates as an inverting amplifier. CR 29, and CR30
protect the +5 Vand the -5.2 V respectively against acciden-
tal over-voltage.
6-4. Digital
Circuitry
Model 776 operation is supervised by the internal CPU.
Through the CPU, the counter measurement process, the
front panel switching, display, and IEEE operation are
all performed under software control. This section
briefly describes the operation of the various sections
of the CPU, and its associated digital circuitry. A sim-
plified block diagram is included for user reference; for
more complete circuit details refer to digital schematics
at the end of this manual.
6-4-l.
CPU Block Diagram
A block diagram of the Model 776 CPU is shown in
Figure 6-3. Circuit operation centers around the CPU
unit - U39. The 803 I is an S-bit CPU capable of directly
addressing up to 64K bytes of program memory (ROM),
and up to another 64K bytes of data memory (RAM).
The CPU works with a 16 MHz clock which is divided
internally to provide a bus operation of about 1.6 MHz.
Software for the CPU is contained in an EPROM
(Erasable Programmable Read-Only Memory). U42 is a
27128 EPROM containing 16K bytes of software. Tem-
porary storage is provided by U43, RAMS (Random
Access Memory) which can store up to 2048 bytes of
information.
Interfacing between the CPU, and the IEEE bus is
performed by dedicated IEEE-488 bus interface IC -
U36. This IC performs many bus functions automat-
ically to minimize CPU overhead. Buffering between
the 8291 IC and the IEEE bus lines is done with bus
drivers U21 and U22.
Interfacing between the CPU to the keyboard and the
display is performed by the Keyboard/Display interface
IC - U36.
64-2.
Memory
Mapping
The 8031 CPU is capable of directly addressing two
banks of 64k (65,536) bytes memory. One bank of mem-
ory is the program memory, and the second memory
bank is the data memory. The selection of the banks is
done internally by the CPU. Although the CPU has this
large addressing capability, only a portion of the possi-
ble memory space is actually needed.
The Model 776 uses a total of 32K of program
memory stored in the 27256 EPROM U43, and a total
of IK of data memory is stored in UIO and. The 8031
CPU uses a memory-mapped I/O scheme, additional
memory location must be allocated for the various I/O
function. All the memory-mapped II0 functions are in
the data memory space.
6-4-3. Address
Decoding
The CPU has a total of 16 address lines which are used
to locate a specific memory slot. The LOW address line
(A0 to A7) are multiplexed on the address/data bus, and
the ALE (address latch enable) signal is used to separate
the LOW address from the address/data bus witch is
done by U40 address latch. Since no memory or inter-
face element can fully decode address locations, addi-
tional address decoding must be used. U38 is l-of-8
decoder. The decoder is enabled when address lines Al5
is HIGH. Once the decoder is selected the decoding is
done by addressing lines All, A12 and A13.
6-4-4. Keyboard/Display
Interface
The Keyboard/Display Interface IC US is used to con-
trol the front panel display, and to find out which one of
the buttons was pushed.
6-4-5. IEEE interface
The Model 776 has a built in IEEE-488 interface that
allows the instrument to be controlled through the sys-
tem controller. Commands may be given over the,bus,
and data may be requested from the instrument as well.
6-14

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