Sony PLM-A55E Service Manual page 36

• YM-11P BOARD IC101 µPD6454GT-628-E2 (CHARACTER GENERATOR)
Pin No. Pin Name
CLK
1
2 CS
3 DATA
4 DVDD
5 OSCOUT
6 OSCIN
7 PCL
8 XOSO
9 XOSI
10 DGND
11 VC
12 VBLK
13 SDE
14 VSYO
15 HSYO
AVDD
16
VBSO
17
VCNT
18
VBSI
19
SSIN
20
SSCR
21
AFDI
22
AGND
23
24 AFDO
I/O
I Serial data transfer clock signal input from the system controller (IC903)
I Chip select signal input from the system controller (IC903)
I Serial data input from the system controller (IC903)
— Power supply terminal (+5V)
O Clock output terminal (for dot clock generate)
I Clock input terminal (for dot clock generate)
Reset signal input from the system controller (IC903)
I
Memory clear at the power on (contents of IC are initialized at "L" → "H")
O Clock output terminal (17.734475 MHz) (for internal video signal generate)
I Clock input terminal (17.734475 MHz) (for internal video signal generate)
— Ground terminal
O Character signal output terminal Not used (open)
O Blanking signal output for the cut video signals Not used (open)
Vertical sync detection signal output to the system controller (IC903)
O
"L": vertical sync signal present
Vertical sync reference signal output to the system controller (IC903)
External video signal mode: Composite sync signal separated synchronously is output
O
Internal video signal mode: Vertical sync signal of internal video signal is output
O Horizontal sync signal output from the APC circuit Not used (open)
— Power supply terminal (+5V)
O Output of composite video signal mixed with character signal
I For adjusting output level of composite video signal and brightness signal
I Composite video signal input terminal
I Composite video signal input for the synchronous separation
I For setting time constant circuit for synchronous separation
I Frequency error voltage input for the AFC VCO circuit
— Ground terminal
O Frequency error voltage output for the AFC VCO circuit
Function
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