TSB41AB1 IEEE 1394a 2000 ONE PORT CABLE TRANSCEIVER/ARBITER SLLS423D – JUNE 2000 – REVISED SEPTEMBER 2002 description (continued) required for normal network operation regardless of the state of the PHY-LLC interface. When the interface is in the reset or disabled state and LPS is again observed active, the PHY initializes the interface and returns it to normal operation.
TVP5146 1.7 Terminal Functions Table 1–1. Terminal Functions TERMINAL DESCRIPTION NAME NUMBER Analog Video VI_1_A VI_1_x: Analog video input for CVBS/Pb/B/C VI_1_B VI_2_x: Analog video input for CVBS/Y/G VI_1_C VI_3_x: Analog video input for CVBS/Pr/R/C VI_2_A VI_4_A: Analog video input for CVBS/Y VI_2_B Up to 10 composite, 4 S-video, and 2 composite or 3 component video inputs (or a combination thereof) VI_2_C...
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TVP5146 Table 1–1. Terminal Functions (Continued) TERMINAL DESCRIPTION NAME NUMBER Host Interface I 2 C clock input I 2 C data bus Power Supplies AGND Analog ground. Connect to analog ground. A18GND_REF Analog 1.8-V return A18VDD_REF Analog power for reference 1.8 V CH1_A18GND CH2_A18GND Analog 1.8-V return...
C BUS Control 5-Input 2-Output AV Switch MM1313 MITSUMI C BUS Control 5-Input 2-Output AV Switch Monolithic IC MM1313 Outline This IC is a 5-input 2-output AV switch with I C control, developed for use in televisions. Two outputs enable it to support two screens or "picture-in-picture".
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C BUS Control 5-Input 2-Output AV Switch MM1313 MITSUMI Equivalent Block Diagram...
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C BUS Control 5-Input 2-Output AV Switch MM1313 MITSUMI Pin Function Pin No. Name Internal equivalent circuit diagram Pin No. Name Internal equivalent circuit diagram MTV-V V1-V V2-V V3-V STV-V V1-Y V2-Y V1-C BIAS V2-C MTV-L V1-L V2-L V3-L STV-L MTV-R V1-R V2-R...
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C BUS Control 5-Input 2-Output AV Switch MM1313 MITSUMI Absolute Maximum Ratings (Ta=25 °C Item Symbol Ratings Units ° -40~+125 Storage temperature ° -20~+75 Operating temperature Power supply voltage Allowable power dissipation Electrical Characteristics (Ta=25°C, V =9V) Measure Conditions (unless otherwise indicated, Item Symbol Min.
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C BUS Control 5-Input 2-Output AV Switch MM1313 MITSUMI Measure Conditions (unless otherwise indicated, Item Symbol Min. Typ. Max. Units ment pin Measurement Circuit Figure 1) Vn-Y : Sine wave 100kHz Maximum input for total higher harmonic distortion factor < 1.0% Input dynamic range 1 : Sine wave 100kHz Maximum input for total higher...
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C BUS Control 5-Input 2-Output AV Switch MM1313 MITSUMI Symbol Measure Conditions (unless otherwise indicated, Min. Typ. Max. Units Item ment pin Measurement Circuit Figure 1) 2 output Sine wave 2.5V , 1kHz -0.5 Voltage gain Frequency characteristics Sine wave 2.5V , 1MHz/1kHz -3.0 Total higher harmonic distortion THD...
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C BUS Control 5-Input 2-Output AV Switch MM1313 MITSUMI Measurement Circuit Measurement Circuit 1...
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C BUS Control 5-Input 2-Output AV Switch MM1313 MITSUMI Measurement Circuit 2 (Crosstalk measurement)
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C BUS Control 5-Input 2-Output AV Switch MM1313 MITSUMI C BUS 7 8 A 1 S:Start Condition P:Stop Condition A:Acknowledge The I C BUS is a BUS system developed by Philips for internal use in equipment. Data transmission is carried out by the two SDA and SCL lines, in byte units, with the MSB first from start condition.
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C BUS Control 5-Input 2-Output AV Switch MM1313 MITSUMI [Status Register] The status register contains data for sending device status to the master. Slave address Status register Address byte Status data The data format is set as shown in the figure above. The first 7 bits in the address byte are allocated to the slave address, and the remaining 1 bit is allocated to the read/write bit.
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C BUS Control 5-Input 2-Output AV Switch MM1313 MITSUMI Switch Control Table 1. Video Output 1 2. Video Output 2 Mute Mute Mute Mute MTV-V MTV-V V1-V V1-V V2-V V2-V V3-V V3-V STV-V STV-V Mute Mute Mute Mute Mute Mute Mute Mute MTV-V...
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C BUS Control 5-Input 2-Output AV Switch MM1313 MITSUMI Application Circuit Notes 1. V is set at 4.4V and C at 4.9V Please note that capacitance polarity may vary depending on comb filter bias. 2. Each audio output can be muted by making pin 19 high. Mute is off when it is open or low.
19-0463; Rev 0; 1/96 Low-Voltage, CMOS Analog Multiplexers/Switches _______________General Description ____________________________Features The MAX4051/MAX4052/MAX4053 and MAX4051A/ Pin Compatible with Industry-Standard MAX4052A/MAX4053A are low-voltage, CMOS analog 74HC4051/74HC4052/74HC4053 ICs configured as an 8-channel multiplexer (MAX4051/A), Guaranteed On-Resistance: two 4-channel multiplexers (MAX4052/A), and three sin- 100Ω...
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Low-Voltage, CMOS Analog Multiplexers/Switches ABSOLUTE MAXIMUM RATINGS Voltages Referenced to GND Continuous Power Dissipation (T = +70°C) V+ ................-0.3V to +17V Plastic DIP (derate 10.53mW/°C above +70°C)....842mW V-................+0.3V to -17V Narrow SO (derate 8.70mW/°C above +70°C)....696mW V+ to V- ..............-0.3V to +17V QSOP (derate 8.00mW/°C above +70°C) .....640mW Voltage into Any Terminal (Note 1) ..(V- - 2V) to (V+ + 2V) CERDIP (derate 10.00mW/°C above +70°C) ....800mW...
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Low-Voltage, CMOS Analog Multiplexers/Switches ELECTRICAL CHARACTERISTICS—Dual Supplies (continued) (V+ = +4.5V to +5.5V, V- = -4.5V to -5.5V, T to T , unless otherwise noted. Typical values are at T = +25°C.) PARAMETER SYMBOL CONDITIONS UNITS (Note 2) = +25°C -0.1 0.002 MAX4051A...
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Low-Voltage, CMOS Analog Multiplexers/Switches ELECTRICAL CHARACTERISTICS—Dual Supplies (continued) (V+ = +4.5V to +5.5V, V- = -4.5V to -5.5V, T to T , unless otherwise noted. Typical values are at T = +25°C.) PARAMETER SYMBOL CONDITIONS UNITS (Note 2) DIGITAL I/O ADD, INH Input Logic C, E, M Threshold High...
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Low-Voltage, CMOS Analog Multiplexers/Switches ELECTRICAL CHARACTERISTICS—Single +5V Supply (V+ = +4.5V to +5.5V, V- = 0V, T to T , unless otherwise noted. Typical values are at T = +25°C.) PARAMETER SYMBOL CONDITIONS UNITS (Note 2) ANALOG SWITCH Analog Signal Range C, E, M = +25°C V+ = 5V, I...
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Low-Voltage, CMOS Analog Multiplexers/Switches ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued) (V+ = +4.5V to +5.5V, V- = 0V, T to T , unless otherwise noted. Typical values are at T = +25°C.) PARAMETER SYMBOL CONDITIONS UNITS (Note 2) DIGITAL I/O SWITCH DYNAMIC CHARACTERISTICS = +25°C Turn-On Time (Note 6) Figure 3...
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Low-Voltage, CMOS Analog Multiplexers/Switches ELECTRICAL CHARACTERISTICS—Single +3V Supply (V+ = +3.0V to +3.6V, V- = 0V, T to T , unless otherwise noted. Typical values are at T = +25°C.) PARAMETER SYMBOL CONDITIONS UNITS (Note 2) ANALOG SWITCH Analog Signal Range C, E, M = +25°C = 1mA, V+ = 3V,...
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Low-Voltage, CMOS Analog Multiplexers/Switches ELECTRICAL CHARACTERISTICS—Single +3V Supply (continued) (V+ = +3.0V to +3.6V, V- = 0V, T to T , unless otherwise noted. Typical values are at T = +25°C.) PARAMETER SYMBOL CONDITIONS UNITS (Note 2) DIGITAL I/O SWITCH DYNAMIC CHARACTERISTICS = +25°C Turn-On Time (Note 6) Figure 3...
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Low-Voltage, CMOS Analog Multiplexers/Switches __________________________________________Typical Operating Characteristics (V+ = +5V, V- = -5V, GND = 0V, T = +25°C, unless otherwise noted.) ON-RESISTANCE vs. V ON-RESISTANCE vs. V ON-RESISTANCE vs. V AND TEMPERATURE (DUAL SUPPLIES) (SINGLE SUPPLY) (DUAL SUPPLIES) V+ = 5V V- = 0V V- = -5V V±...
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Low-Voltage, CMOS Analog Multiplexers/Switches ____________________________Typical Operating Characteristics (continued) (V+ = +5V, V- = -5V, GND = 0V, T = +25°C, unless otherwise noted.) TOTAL HARMONIC DISTORTION FREQUENCY RESPONSE vs. FREQUENCY V± = ±5V 600Ω IN AND OUT INSERTION LOSS OFF ISOLATION ON PHASE 50Ω...
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Low-Voltage, CMOS Analog Multiplexers/Switches Table 1. Truth Table/Switch Programming ADDRESS BITS ON SWITCHES MAX4051/ MAX4052/ MAX4053/ ADDC* ADDB ADDA MAX4051A MAX4052A MAX4053A All switches open All switches open All switches open COMA–NCA, COMB–NO0B, COM–NO0 COMB–NCB, COMC–NO0C COMC–NCC COMA–NOA, COMB–NO1B, COM–NO1 COMB–NCB, COMC–NO1C COMC–NCC...
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Low-Voltage, CMOS Analog Multiplexers/Switches V+ and GND power the internal logic and logic-level translators, and set both the input and output logic lim- its. The logic-level translators convert the logic levels into switched V+ and V- signals to drive the gates of EXTERNAL BLOCKING DIODE the analog signals.
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Low-Voltage, CMOS Analog Multiplexers/Switches ______________________________________________Test Circuits/Timing Diagrams ADDC ADDB NO1–NO6 ADDA MAX4051/A 50Ω 35pF 300Ω TRANS TRANS ADDC ADDB NO1–NO2 MAX4052/A 50Ω 35pF 300Ω TRANS TRANS MAX4053/A 50Ω 35pF 300Ω TRANS TRANS V- = 0V FOR SINGLE-SUPPLY OPERATION. REPEAT TEST FOR EACH SECTION. Figure 2.
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Low-Voltage, CMOS Analog Multiplexers/Switches ADDC ADDB NO1–NO7 ADDA MAX4051/A 35pF 300Ω 50Ω ADDC ADDB NO1–NO3 MAX4052/A 35pF 300Ω 50Ω MAX4053/A 35pF 300Ω 50Ω V- = 0V FOR SINGLE-SUPPLY OPERATION. REPEAT TEST FOR EACH SECTION. Figure 3. Enable Switching Time...
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Low-Voltage, CMOS Analog Multiplexers/Switches V ADD V ADD ADDC NO0–N07 ADDC NO0–NO3 ADDB ADDB ADDA MAX4052/A MAX4051/A 50Ω 50Ω V OUT V OUT 35pF 35pF 300Ω 300Ω < 20ns V ADD < 20ns NO, NC MAX4053/A 50Ω V OUT 35pF 300Ω...
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Low-Voltage, CMOS Analog Multiplexers/Switches 10nF NETWORK ANALYZER V IN V OUT 50Ω 50Ω OFF ISOLATION = 20log V IN ADDC CHANNEL ADDB MAX4051/A SELECT V OUT ADDA MAX4052/A ON LOSS = 20log V IN MAX4053/A V OUT MEAS. REF. V OUT CROSSTALK = 20log V IN 50Ω...
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Low-Voltage, CMOS Analog Multiplexers/Switches ___________________________________________Ordering Information (continued) PART TEMP. RANGE PIN-PACKAGE PART TEMP. RANGE PIN-PACKAGE MAX4051AEPE -40°C to +85°C 16 Plastic DIP MAX4053ACPE 0°C to +70°C 16 Plastic DIP MAX4051AESE -40°C to +85°C 16 Narrow SO MAX4053ACSE 0°C to +70°C 16 Narrow SO MAX4051AEEE -40°C to +85°C...
www.fairchildsemi.com FSDM07652RB Green Mode Fairchild Power Switch (FPS Features OUTPUT POWER TABLE • Internal Avalanche Rugged Sense FET 230VAC ±15% 85-265VAC • Advanced Burst-Mode operation consumes under 1 W at 240VAC & 0.5W load PRODUCT Adapt- Open Adapt- Open • Precision Fixed Operating Frequency (66kHz) Frame Frame •...
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FSDM07652RB Pin Definitions Pin Number Pin Name Pin Function Description This pin is the high voltage power Sense FET drain. It is designed to drive the Drain transformer directly. This pin is the control ground and the Sense FET source. This pin is the positive supply voltage input.
FSDM07652RB Absolute Maximum Ratings (Ta=25°C, unless otherwise specified) Parameter Symbol Value Unit Vstr Max Voltage °C) Pulsed Drain current (Tc=25 °C) Continuous Drain Current(Tc=25 °C) Continuous Drain Current(Tc=100 Single pulsed avalanche energy Single pulsed avalanche current Supply voltage Input voltage range -0.3 to V °C) Total power dissipation(Tc=25...
FSDM07652RB Electrical Characteristics (Ta = 25°C unless otherwise specified) Parameter Symbol Condition Min. Typ. Max. Unit Sense FET SECTION Drain source breakdown voltage = 0V, I = 250µA µA = 650V, V = 0V Zero gate voltage drain current = 520V µA = 0V, T = 125°C...
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FSDM07652RB TOTAL DEVICE SECTION =GND, V =14V Operating supply current =GND, V =10V OP(MIN) =GND, V =18V OP(MAX) Notes: 1. Pulse test : Pulse width ≤ 300µS, duty ≤ 2% 2. These parameters, although guaranteed at the design, are not tested in mass production. 3.
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FSDM07652RB Comparison Between FS6M07652RTC and FSDM07652RB Function FS6M07652RTC FSDM07652RB FSDM07652RB Advantages Soft-Start Adjustable soft-start Internal soft-start with • Gradually increasing current limit time using an typically 10ms (fixed) during soft-start further reduces peak external capacitor current and voltage component stresses •...
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FSDM07652RB Typical Performance Characteristics (These Characteristic Graphs are Normalized at Ta= 25°C) 1. 2 1. 0 0. 8 0. 6 0. 4 0. 2 0. 0 -50 -25 Junction Temperature(℃) Junction Temperature(℃) Operating Current vs. Temp Start Threshold Voltage vs. Temp -50 -25 100 125 Junction Temperature(℃)
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FSDM07652RB Typical Performance Characteristics (Continued) (These Characteristic Graphs are Normalized at Ta= 25°C) Junction Temperature(℃) Junction Temperature(℃) ShutDown Feedback Voltage vs. Temp ShutDown Delay Current vs. Temp 1. 2 1. 0 0. 8 0. 6 0. 4 0. 2 0. 0 Junction Temperature(℃) Junction Temperature(℃) Over Voltage Protection vs.
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FSDM07652RB Typical Performance Characteristics (Continued) (These Characteristic Graphs are Normalized at Ta= 25°C) Junction Temperature(℃) Soft Start Time vs. Temp...
FSDM07652RB Functional Description 2.1 Pulse-by-pulse current limit: Because current mode 1. 1. 1. 1. Startup : In previous generations of Fairchild Power control is employed, the peak current through the Sense FET Switches (FPS ) the Vcc pin had an external start-up is limited by the inverting input of PWM comparator (Vfb*) resistor to the DC input voltage line.
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FSDM07652RB V V V V Fault occurs Fault Power Over load protection Over load protection Over load protection Over load protection removed 6.0V 6.0V 6.0V 6.0V 2.5V 2.5V 2.5V 2.5V T T T T = Cfb*(6.0-2.5)/I = Cfb*(6.0-2.5)/I = Cfb*(6.0-2.5)/I = Cfb*(6.0-2.5)/I delay delay...
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FSDM07652RB 5. Burst operation : In order to minimize power dissipation in standby mode, the FSDM07652RB enters burst mode operation. As the load decreases, the feedback voltage decreases. As shown in Figure 8, the device automatically enters burst mode when the feedback voltage drops below (500mV).
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FSDM07652RB Typical application circuit Application Output power Input voltage Output voltage (Max current) Universal input 5V (2.0A) LCD Monitor (85-265Vac) 12V (2.5A) Features • High efficiency (>81% at 85Vac input) • Low zero load power consumption (<300mW at 240Vac input) •...
FSDM07652RB DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
July 2003 LP2995 DDR Termination Regulator General Description Features n Low output voltage offset The LP2995 linear regulator is designed to meet the JEDEC SSTL-2 and SSTL-3 specifications for termination of DDR- n Works with +5v, +3.3v and 2.5v rails SDRAM.
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TERMINATION TERMINATION AT E5.1 AT DDR The VTT side of the terminaton resistors should be placed on a wide VTT island on the surface layer. The island is located at each end of the bus, so it does not interfere with the signal routing.
Modify Notes: 2005.01.08 U1 Supply voltage from +6.2V to +5V Del Net E5_C Add C166,C167,C168 when in mtk scart and out scart(rgb) ,exist interference. P7. add gcode ic P9. add r210,r211,r213,r214 amend the sound distortion when playing vcd,stero out,connect KONGJA tv add c169,c176 amend log picture distortion 2005.01.12...
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MAIN PANEL BOARD DESCRIPTION QUALITY LOCATION 2100010 Line 0.6 5mm J4,J5,J6,J7,J8 2100004 Line 0.6 10mm J1,J2,J3 2121546 Line 10P150 2.0 CN2 ( connect to main board CN4) 2121626 Line 5P450 2.0 CN1 (connect to power boardCN5) 2121548 Line 2P100 2.0 CN3 (connect to VCR PCB) 2121545 Line...