S1D13506F00A (Xz690A00) Color Lcd / Crt / Tv Controller - Yamaha Tyros TRS-MS01 Sevice Manual

S1D13506F00A (XZ690A00)
PIN
NAME I/O FUNCTION
NO.
1 AB2 I Address bus input (A [12:1])
2 AB1 I Address bus input (A [12:1])
3 AB0 I SH-3 bus Interface
4 CS# I Decode
5 M/R# I/O Registor Setting
6 BS# I Bus Start Signal Input
7 RD# I Read Signal Input
8 WE0# I Wright Enable input
9 WE1# I/O Wright Enable input
10 RD/WR# I Read / Wright Signal Input
11 RESET# I Reset
12 V V
DD DD
13 BUSCLK I System Bus Clock
14 V V
SS SS
15 WAIT# O Wait Output
16 DB15 I/O System Data Bus
17 DB14 I/O System Data Bus
18 DB13 I/O System Data Bus
19 DB12 I/O System Data Bus
20 DB11 I/O System Data Bus
21 DB10 I/O System Data Bus
22 DB9 I/O System Data Bus
23 DB8 I/O System Data Bus
24 DB7 I/O System Data Bus
25 DB6 I/O System Data Bus
26 DB5 I/O System Data Bus
27 DB4 I/O System Data Bus
28 DB3 I/O System Data Bus
29 DB2 I/O System Data Bus
30 DB1 I/O System Data Bus
31 DB0 I/O System Data Bus
32 V V
SS SS
33 V V
DD DD
34 MD15 I/O Memory data I/O bus
35 MD0 I/O Memory data I/O bus
36 MD14 I/O Memory data I/O bus
37 MD1 I/O Memory data I/O bus
38 MD13 I/O Memory data I/O bus
39 MD2 I/O Memory data I/O bus
40 MD12 I/O Memory data I/O bus
41 MD3 I/O Memory data I/O bus
42 MD11 I/O Memory data I/O bus
43 MD4 I/O Memory data I/O bus
44 MD10 I/O Memory data I/O bus
45 MD5 I/O Memory data I/O bus
46 MD9 I/O Memory data I/O bus
47 MD6 I/O Memory data I/O bus
48 MD8 I/O Memory data I/O bus
49 MD7 I/O Memory data I/O bus
50 V V
SS SS
51 LCAS# O LCAS# output
52 UCAS# O UCAS# output
53 WE# O WE# output
54 RAS# O RAS# output
55 V V
DD DD
56 MA9 I/O GPIO3
57 MA11 I/O GPIO2
58 MA8 O Maltiplex memory address bus
59 MA10 I/O GPIO1
60 MA7 O Maltiplex memory address bus
61 MA0 O Maltiplex memory address bus
62 MA6 O Maltiplex memory address bus
63 MA1 O Maltiplex memory address bus
64 MA5 O Maltiplex memory address bus
COLOR LCD / CRT / TV Controller
PIN
NAME
NO.
65 MA2
66 MA4
67 MA3
68 V
SS
69 CLKI
70 TESTEN
71 CLKI2
72 V
DD
73 FPFRAME O
74 FPLINE
75 NC
76 DRDY
77 FPSHIFT O
78 V
SS
79 FPDAT0
80 FPDAT1
81 FPDAT2
82 FPDAT3
83 FPDAT4
84 FPDAT5
85 FPDAT6
86 FPDAT7
87 V
SS
88 FPDAT8
89 FPDAT9
90 FPDAT10 O
91 FPDAT11 O
92 FPDAT12 O
93 FPDAT13 O
94 FPDAT14 I/O
95 FPDAT15 I/O
96 V
SS
97 V
DD
98 DACV
99 DACV
100 RED
101 IREF
102 DACV
103 GREEN
104 DACV
105 BLUE
106 DACV
107 HRTC
108 VRTC
109 V
DD
110 V
SS
111 AB20
112 AB19
113 AB18
114 AB17
115 AB16
116 AB15
117 AB14
118 AB13
119 AB12
120 AB11
121 AB10
122 AB9
123 AB8
124 AB7
125 AB6
126 AB5
127 AB4
128 AB3
I/O FUNCTION
O Maltiplex memory address bus
O Maltiplex memory address bus
O Maltiplex memory address bus
V
SS
I Selectable Input clock
I Test enable interface
I Selectable Input clock
V
DD
Frame pulse
O Line pulse
O MOD output
Shift clock
V
SS
O LCD panel data bus
O LCD panel data bus
O LCD panel data bus
O LCD panel data bus
O LCD panel data bus
O LCD panel data bus
O LCD panel data bus
O LCD panel data bus
V
SS
O LCD panel data bus
O LCD panel data bus
LCD panel data bus
LCD panel data bus
LCD panel data bus
LCD panel data bus
LCD panel data bus
LCD panel data bus
V
SS
V
DD
DACV
SS SS
DACV
DD DD
O CRT output: RED
I DAC current
DACV
DD DD
O CRT output: GREEN
DACV
DD DD
O CRT output: BLUE
DACV
SS SS
O Horizontal trace signal
O Vertical trace signal
V
DD
V
SS
I Address bus input (A20)
I Address bus input (A19)
I Address bus input (A18)
I Address bus input (A17)
I Address bus input (A [16:13])
I Address bus input (A [16:13])
I Address bus input (A [16:13])
I Address bus input (A [16:13])
I Address bus input (A [12:1])
I Address bus input (A [12:1])
I Address bus input (A [12:1])
I Address bus input (A [12:1])
I Address bus input (A [12:1])
I Address bus input (A [12:1])
I Address bus input (A [12:1])
I Address bus input (A [12:1])
I Address bus input (A [12:1])
I Address bus input (A [12:1])
Tyros / TRS-MS01
DM: IC72
35