Samsung WA31273A Technical Manual
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Samsung WA31273A Technical Manual

Samsung WA31273A Technical Manual

Winner 3a; winner 2a series ide drives
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Technical Manual
3.5" Hard Disk Drives
Winner 3A / 2A
WA31273A / WA32543A
WA33203A / WA31083A
WA32163A / WA32162A
FEBRUARY,1998(REV.D)

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Summary of Contents for Samsung WA31273A

  • Page 1 Technical Manual 3.5” Hard Disk Drives Winner 3A / 2A WA31273A / WA32543A WA33203A / WA31083A WA32163A / WA32162A FEBRUARY,1998(REV.D)
  • Page 2 This TECHNICAL MANUAL may contain some technical inaccuracies or typographical errors. Changes are periodically made to the information herein, these changes will be incorporated in new editions of this publication. SAMSUNG may make improvements and/or changes in the product(s) described in this publication at any time.

  • Page 3: Chapter 1 Scope

    In addition, it provides a list of other references that might be helpful to the reader. User Definition The Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A technical manual is intended for the following readers: •...

  • Page 4: Terminology And Conventions

    FORMAT C:/S • Commands and Messages Interface commands and messages sent from the drive to the host are listed in all capitals. For example: READ CONFIGURATION WRITE LONG 2 WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A...
  • Page 5 In general, the system in which the drive resides is referred to as the host. Reference For additional information about the AT interface, refer to: • ATA-3 (AT Attachment 3), Revision 7B, 27 January, 1997 WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 1-3...

  • Page 6: Overall Description

    Chapter 2 OVERALL DESCRIPTION This chapter summarizes general functions and key features of Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A drives, as well as the standards and regulations they meet. Introduction The Samsung Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A 3.5 inch disk drives are low cost, high capacity, high...

  • Page 7: Key Features

    Overall Description Key features Key features of the Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A hard disk drives include: • Formatted capacity of 1.27, 2.54, 3.2, 2.16, 1.08, 2.16 Gbytes respectively. • Low-profile, 1-inch height form factor •...

  • Page 8: Standards And Regulations

    Overall Description Standards and regulations The Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A depends upon its host equipment to provide proper power and environment to achieve optimum performance and compliance with applicable industry and governmental regulations.

  • Page 9: Specification Summary

    Chapter 3 SPECIFICATIONS This chapter gives a detailed description of the physical, electrical, and environmental characteristics of the Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A hard disk drives. Specification Summary TABLE 3-1. Specifications...

  • Page 10: Physical Specifications

    Logical configurations DESCRIPTION WA31273A WA31083A WA32162A WA32543A WA32163A WA33203A Default logical mode : 2,481 2,094 4,186 Number of cylinders 4,962 4,190 6,203 Number of heads Number of sectors 2 WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A...

  • Page 11: Performance Specifications

    ∗ The controller overhead is the time it takes to start a seek after the drive has been selected. ∗ The average latency time is the time needed for another 1/2 revolution after seek completion. WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A...
  • Page 12 * Random seek means seek commands with logical random location and 30% NOTES duty cycle. * Random read/write means a combination of random write 256 sectors commands and random read 256 sectors command 4 WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A...

  • Page 13: Environmental Specifications

    Operating 5-21Hz 0.034"(double amplitude) 22-400Hz 1.5 G (p-p) Non-operating 0.195"(double amplitude) 5-21Hz 8.0 G (p-p) 22-500Hz Shock : (1/2 sine pulse, 11ms duration) Operation 10 G's Non-operating 75 G's WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A...
  • Page 14 Random Read/Write < 40 dBA NOTE : The Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A hard disk drives can withstand levels of shock and vibration applied to any of its three mutually perpendicular axes, as in the specifications for shock and vibration.

  • Page 15: Space Requirements

    WA32162A hard disk drive. It also describes how to start and operate the drive. Space Requirements SAMSUNG ships the Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A hard disk drives without a bezel. Figure 4-1 shows the external dimensions of the drive.

  • Page 16: Unpacking Instructions

    Installation and Operation Unpacking Instructions (1) Open the shipping container of the Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A (2) Lift the packing assembly that contains the drive out of the shipping container.
  • Page 17 Figure 4-2 shows the physical dimensions and mounting holes located on each side of the drive. The mounting holes on the Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A hard disk drive allow the drive to be mounted in any orientation.
  • Page 18 CAUTION : Using mounting screws that are longer than the maximum lengths Winner 3A WA31273A / specified in Figure 4-3 voids the warranty on the WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A. WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A...
  • Page 19 Installation and Operation 4-3-3 Ventilation The Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A hard disk drive operates without a cooling fan, provided the ambient air temperature does not exceed 55ºC. Any user-designed cabinet must provide adequate air circulation to prevent exceeding the maximum temperature.
  • Page 20 Installation and Operation Figure 4-4. DC Power Connector (J7) and AT-Bus Connector (J2) WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A...

  • Page 21: Jumper Definitions

    Slave Mode Default Jumper Setting - Master Mode STDFSs ST CSELC CSEL SLAVE SLAV MASTE MASTER Slave Jumper Setting - Slave Mode CSEL CSEL SLAVE SLAV MASTE MASTER WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A...
  • Page 22 To specify a drive as the Slave (Drive) remove the master jumper and install the jumper on the slave pins. NOTE: The order in which drives are connected in a daisy chain has no significance. WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A...
  • Page 23 Installation and Operation Figure 4-5. Jumper Pin Locations on the Drive PCB WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A...

  • Page 24: Drive Installation

    Installation and Operation 4-5-2 Drive Installation You can install the Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A hard disk drive in an AT-compatible system in two ways. • To install the drive with a motherboard that contains a 40-pin AT-bus connector, connect the drive to the motherboard using a 40-pin ribbon cable.

  • Page 25: System Startup Procedure

    Installation and Operation System Startup Procedure Once you have installed the Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A hard disk drive and the adapter board (if required) in your system, you can to partition and format the drive for operation. To setup the drive correctly, follow these instructions: (1) Power on the system.
  • Page 26 "user-defined" drive type, select a drive type whose total number of sectors* are less than or equal to the number of data sectors of the Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A.

  • Page 27: Disk Drive Operation

    Chapter 5 DISK DRIVE OPERATION This chapter describes the operation of the Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A functional subsystems. It is intended as a guide to the operation of the drive, rather than a detailed theory of operation.

  • Page 28: Spindle Motor Assembly

    HDA. The motor rotates the spindle shaft at 5400(Winner 3A) rpm and 4500(Winner 2A) rpm. Figure 5-1. Exploded Mechanical view 2 WA31273A / WA32543A / WA33203A / WA32163A / WA31083A /...

  • Page 29: Disk Stack Assembly

    Disk Drive Operation 5-1-4 Disk Stack Assembly The disk stack assembly in the Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A hard disk drive consists of 1, 2 or 3 disks and disk spacers secured on the hub of the Spindle Motor Assembly by a disk clamp.

  • Page 30: Drive Electronics

    Drive Electronics The Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A drives attain their intelligence and performance through the specialized electronic components mounted on the PCBA. figure 5-2 shows a simplified block diagram of the the Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A electronics.
  • Page 31 5-2-1 Integrated AT Interface, Disk Controller, Buffer Manager and Microprocessor The Samsung SID-9501 incorporates a high speed 16-bit Fixed Point DSP (PINE Core) microprocessor to perform the ATA interface control, buffer data flow management, disk format/ read/write control, error correction functions of an embedded disk drive controller, as well as embedded servo control.
  • Page 32 • Automatic data transfer management for Read/Write Multiple. • ATA Multi-word DMA Mode 2 support (16.6MB/sec). • Fast IDE PIO Mode 4 support (16.6MB/sec). • Automatic Task File Management. 6 WA31273A / WA32543A / WA33203A / WA32163A / WA31083A /...
  • Page 33 Automatic detection of both the software AT reset and hardware AT reset. • 12-mA drivers are provided for direct connection to the ISA/EISA bus. Some ATA inputs are Schmitt trigger inputs. WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A5-7...
  • Page 34 EDO-DRAM support with up to 4 MB addressing capability (Page 8 mode). • Buffer bandwidth: 50 MB/sec. • Minimum Latency Read support. • Auto Data Streaming for Host and Disk. • Servo Pointer wrap capability. 8 WA31273A / WA32543A / WA33203A / WA32163A / WA31083A /...

  • Page 35: The Disk Control Block

    Automatic time-out support when waiting for Sync, Index, Sector, and End of Servo burst to relieve microprocessor of overhead associated with managing time outs. • 34 Byte Disk FIFO. • Automatic Split Field Processing for CDR. • Automatic timeout with two-revolution timer WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A5-9...
  • Page 36 1.2µs conversion time per channel • Pipelined Conversion Mode • 12-bit resolution DAC • Programmable Servo Address Mark control • Di-pulse Gray Code decoder • Programmable read channel interface 10 WA31273A / WA32543A / WA33203A / WA32163A / WA31083A /...

  • Page 37: Automatic Gain Control (Agc)

    Automatic Gain Control (AGC) The Automatic Gain Control (AGC) is used to maintain a constant signal amplitude at the input of the pulse detector while the input to the amplifier varies. WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A5-11...

  • Page 38: Data Separator

    After the pulses have been detected they must be further qualified by the survival sequence registers and associated logic. 5-2-2-2 Data Separator 12 WA31273A / WA32543A / WA33203A / WA32163A / WA31083A /...

  • Page 39: Servo System

    The Servo System also compensates for thermal offsets between heads on different surfaces and vibration and shock applied to the drive. The Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A is an Embedded Sector Servo System Positioning information is radially located in 72 evenly-spaced servo sectors on each track.

  • Page 40: Read And Write Operations

    The SID-9501D switches the Preamplifier and Write Driver IC to write mode and selects a head. Once the Preamplifier and Write Driver IC receives a write gate signal, it transmits current reversals to the head, which writes magnetic transitions on the disk 14 WA31273A / WA32543A / WA33203A / WA32163A / WA31083A /...

  • Page 41: Firmware Features

    5-5-1 Read Caching The Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A hard disk drives use a 128K Read Cache to enhance drive performance. The feature significantly improves system throughput. Use the SET FEATURES command to enable or disable Read Caching.

  • Page 42: Write Caching

    5-5-3 Defect Management The Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A media is scanned for defects as part of the factory test process. After the defect scanning the defective sectors are saved in the defect list. The defect encountered in manufacturing process is slipped to next physical sector location.

  • Page 43: Multi-Burst Ecc Correction

    The drive uses a 144 bit Reed-Solomon code to perform error detection and correction. For each 512 byte block, the software error correction polynomial is capable of correcting: • one single burst error • three burst error WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A5-17...
  • Page 44 Single bursts of 65 bits or less and three 17 bit burst error or less are corrected on the fly with no performance degradation. 5-5-6 SMART The Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A supports SMART (Self-Monitoring, Analysis and Reporting Technology). The following commands are featured: •...

  • Page 45: At Interface And Ata Commands

    SAMSUNG integrates and delivers the cutting edge in technology. SAMSUNG AT class disk drives are designed to relieve and to enhance the I/O request processing function of system drivers.

  • Page 46: Signal Summary

    This is an 8- or 16-bit bi-directional data bus between the host and the drive. The lower 8 bits are used for 8-bit transfers e.g. registers, ECC bytes. 2 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...
  • Page 47 Set Multiple command. An exception occurs on Format Track, Write Sector(s), Write Buffer and Write Long commands - INTRQ shall not be asserted at the beginning of the first data block to be transferred. WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-3...
  • Page 48 Drive 1 Status Register to 00h. Drive 0 will be unable to accept commands until it has finished its reset procedure and is Ready (DRDY=1). 4 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...
  • Page 49 DB10 SD10 ←→ ←→ DB11 SD11 ←→ ←→ DB12 SD12 ←→ ←→ DB13 SD13 ←→ ←→ DB14 SD14 ←→ ←→ DB15 SD15  Ground Ground Keypin No Connection WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-5...
  • Page 50 CS0- CS1FX- ← CS1- CS3FX- DASP- DASP- *→  Ground Ground * Drive Intercommunication Signals Drive 1 Drive 0 Host  PDIAG →   DASP- → → 6 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...
  • Page 51 DD11 - Bit 11 DD12 - Bit 12 DD13 - Bit 13 DD14 - Bit 14 DD15 - Bit 15 DIOR- Drive I/O Read DIOW- Drive I/O Write WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-7...
  • Page 52 NOTE : A minus sign follows the name of any signal that is asserted as active low. Direction (DIR) is in reference to the drive: IN indicates input to the drive. OUT indicates output from the drive. I/O indicates that the signal is bi-directional. 8 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...

  • Page 53: Logical Interface

    Number register, Cylinder Low register, Cylinder High register and HS3-HS0 of the Device/Head register contains the zero based-LBA. This term defines the addressing mode of the device as being by physical sector address. WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-9...
  • Page 54 High Impedance Not Used High Impedance Not Used High Impedance Not Used Alternate Status Device Control Device Address Not Used Command Block Registers Data Data Error Register Features 10 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...

  • Page 55: Control Block Register Descriptions

    The only difference being that reading this register does not imply interrupt acknowledgment nor clear a pending interrupt. DRDY CORR NOTE : See section 6.3.4.10 for definitions of the bits in this register. WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-11...

  • Page 56: Command Block Register Descriptions

    This 16-bit register is used to transfer data blocks between the device data buffer and the host. It is also the register through which sector information is transferred on a Format Track command. Data transfers may be either PIO or DMA. 12 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...
  • Page 57 • AMNF (Address Mark Not Found) indicates the data address mark has not been found after finding the correct ID field. NOTE : Unused bits are cleared to zero. WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-13...
  • Page 58 Parameters command, the contents of this register defines the number of heads minus 1. • DRV is the binary encoded drive select number. When DEV=0, Device 0 is selected. When DEV=1, Device 1 is selected. 14 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...
  • Page 59 • DWF (Drive Write Fault) indicates the current write fault status. When an error occurs, this bit is not changed until the Status Register is read by the host, at which WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-15...
  • Page 60 • ERR (Error) indicates that an error occurred during execution of the previous command. The bits in the Error Register have additional information regarding the cause of the error. 16 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...

  • Page 61: At Command Register Descriptions

    PARAMETER USED Class DESCRIPTION CODE Execute Device Diagnostic Format Track Identify Device Idle 97h,E3h Idle Immediate 95h,E1h Initialize Drive Parameter Read Buffer Read DMA (w/retry) Read DMA (w/o retry) WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-17...
  • Page 62 - The register contains a valid parameter for this command. For the Device/Head Register, y means both the device and head parameters are used. D - Only the drive parameter is valid and not the head parameter, 18 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...

  • Page 63: Check Power Mode (98H,E5H)

    Error Register. If Drive 1 passes diagnostics or there is no Drive 1 connected, Drive 0 "ORs" 00h with its own status and loads that code into the Error Register. WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-19...

  • Page 64: Format Track (50H)

    Some parameters are defined as a sixteen bit value. A word which is defined as a sixteen bit value places the most significant bit of the value on bits DD15 and the least significant bit on bit DD0. 20 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...
  • Page 65 SET FEATURES command should be used to switch the length of READ LONG and WRITE LONG commands from 512 plus 4 to 512 plus the value specified in this word. WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-21...
  • Page 66 Bit 10 of word 49 is used to indicate a device’s ability to enable disable the use of IORDY. If this bit is set to one, then the device supports the disabling of IORDY. Control of IORDY is accomplished using the SET FEATURES command. 22 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...
  • Page 67 The number of user-addressable logical cylinders in the current translation mode. 6-4-4-14 Word 53 : Number of current logical heads The number of user-addressable logical heads per logical cylinder in the current translation mode. WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-23...
  • Page 68 If this field is supported, bit 1 of word 53 shall be set. Any device which supports Multi- word DMA Mode 1 or above shall support this field, and the value in word 65 shall not 24 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...
  • Page 69 Any device which supports PIO Mode 3 or above must this field, and the value in word 68 shall not be less than the fastest PIO mode reported bythe device. WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-25...
  • Page 70 Number of logical sectors per logical track Vendor specific 10-19 Serial number Vendor specific (obsolete) Vendor specific (obsolete) # of vendor specific bytes avail on READ/WRITE LONG cmds 26 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...
  • Page 71 0 = the fields reported in words 64-70 are not valid 0 1 = the fields reported in words 54-58 are valid 0 = the fields reported in words 54-58 may be valid Number of current logical cylinders WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-27...
  • Page 72 Minimum PIO xfer cycle time with IORDY flow control 15-0 Cycle time in nanoseconds 69-70 Reserved (for advanced PIO mode support) 71-127 Reserved 128-159 Vendor specific 160-255 Reserved 28 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...

  • Page 73: Idle (97H,E3H)

    Drive/Head Register which specifies the number of heads minus 1. The DRV bit designates these values to Drive 0 or Drive 1, as appropriate. WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-29...

  • Page 74: Read Dma (C8H)

    During a Read Long command, the drive does not check the ECC bytes to determine if there has been a data error. Only single sector Read Long operations are supported. 30 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...

  • Page 75: Read Multiple Command (C4H)

    0 requests 256 sectors. The transfer begins at the sector specified in the Sector Number Register. See 6.6.1 for the DRQ, IRQ and BSY protocol on data transfers. WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-31...

  • Page 76: Set Features (Efh)

    If another command is issued to the drive while a seek is being executed, the drive sets BSY=1, waits for the seek to complete, and then begins execution of the command. 6-4-17 Set Features (EFh) 32 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...

  • Page 77: Multi-Word Dma

    This command enables the drive to perform Read and Write Multiple operations and establishes the block count for these commands. Refer to section 6.6.3 for protocol. The Sector Count Register is loaded with the number of sectors per block. Drives WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-33...

  • Page 78: Sleep (99H,E6H)

    This command causes the drive to enter the Standby Mode. See 6.6.3 for protocol. The drive may return the interrupt before the transition to Standby Mode is completed. If the drive is already spun down, the spin down sequence is not executed. 34 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...

  • Page 79: Write Buffer (E8H)

    The contents of the Command Block Registers following the transfer of a data block which had a sector in error are undefined. The host should retry the transfer as individual requests to obtain valid error information. WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-35...

  • Page 80: Write Dma (Cah)

    CHS mode, logical block address in LBA mode. The host may then read the command block to determine what 36 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...

  • Page 81: Reset Response

    The default values for the Command Block Registers if no self-tests are performed or if no errors occurred are: Error Cylinder Low = 00h Sector Count Cylinder High = 00h Sector Number Drive/Head = 00h WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-37...

  • Page 82: Error Posting

    The errors that are valid for each command are defined in Table 6-7. See 6.3.4.4 and 6.3.4.10 for the definition of the Error Register and Status Register bits. 38 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...
  • Page 83 Read DMA Read Long Read Multiple Read Sector(s) Read Verify Sector(s) Seek Set Features Set Multiple Mode Sleep Standby Standby Immediate Write Buffer Write DMA Write Long Write Multiple WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-39...

  • Page 84: Power Conditions

    When a Sleep command is received, the drive enters the Sleep mode. The lowest power consumption occurs in Sleep mode. When in Sleep mode, the drive requires a reset to be activated (see 6.4.18). 40 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...
  • Page 85 Table 6-11. Power Conditions MODE SRST DRDY Interface Active Media SLEEP STANDBY IDLE NORMAL * : See 6.4.18 1 : Active 0 : Inactive x : don't care WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-41...

  • Page 86: Protocol Overview

    Data Register. In response to the Status Register being read, the drive negates INTRQ. f) The drive clears DRQ. If transfer of another sector is required, the drive also sets BSY and the above sequence is repeated from d). 42 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...

  • Page 87: Pio Data Out Commands

    Number, Cylinder and Drive/Head registers. b) The host writes the command code to the Command Register. c) The drive sets DRQ when it is ready to accept the first sector of data. WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-43...
  • Page 88 DRQ=1 DRQ=0 Assert Negate Assert Negate INTRQ INTRQ INTRQ INTRQ 6-6-2-2 PIO Write Aborted Command Setup Issue Read Command Status BSY=0 BSY=1 BSY=0 DRDY=1 Assert Negate INTRQ INTRQ 44 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...

  • Page 89: Non-Data Commands

    The drive sets BSY. d) When the drive has completed processing, it clears BSY and asserts INTRQ. e) The host reads the Status Register. f) The drive negates INTRQ. WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-45...
  • Page 90 1) The slave-DMA channel qualifies data transfers to and from the drive with DMARQ. c) Status phase 1) Drive generates the interrupt to the host. 2) Host resets the slave-DMA channel. 3) Host reads the Status Register and Error Register. 46 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...
  • Page 91 Reset DMA Status Initialize DMA Command BSY=1 BSY=x BSY=1 BSY=0 BSY=0 DRQ=1 nIEN=0 6-6-5-3 Aborted DMA Command Initialize DMA Command Reset DMA Status BSY=0 BSY=1 BSY=1 BSY=0 nIEN=0 WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-47...
  • Page 92 DIORB/DIOWB hold time to DMACKB TDHT * DMACKB negated to DD tristated TMWC Multi-word DMA cycle time Applies at end of an ATA multi-word DMA cycle, when DMACKB is negated 48 WA31273A / WA32543A / WA33203A / WA3216A / WA31083A / WA32162A...
  • Page 93 I O R D Y T I O C S L T I O C S H I O C S 1 6 B Figure 6-2. ATA PIO Timing WA31273A / WA32543A / WA33203A / WA32163A / WA31083A / WA32162A 6-49...

  • Page 94: General Information

    When servicing a drive, the service technician should observe the following precautions to avoid damage to the drive or personal injury. (1) Do not attempt to open the sealed compartment of the Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A, as this will void the warranty and contaminate the media.

  • Page 95: Service And Repair

    7-3 Service And Repair The service and repair of the Winner 3A WA31273A / WA32543A / WA33203A / WA32163A / WA31083A, Winner 2A WA32162A can be done at a SAMSUNG Service Center. Please contact your representative for warranty information and service/return procedures.

This manual is also suitable for:

Wa32543aWa33203aWa32163aWa31083aWa32162a

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