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Philips Semiconductors
3.3 V or 5.0 V Universal Asynchronous
Receiver/Transmitter (UART)
8
D0–D7
RDN
WRN
CEN
4
A0–A3
RESET
INTRN
X1/CLK
X2
2004 Oct 21
BUS BUFFER
OPERATION CONTROL
ADDRESS
DECODE
R/W CONTROL
INTERRUPT CONTROL
IMR
ISR
GP
TIMING
BAUD RATE
GENERATOR
CLOCK
SELECTORS
COUNTER/
TIMER
XTAL OSC
CSR
ACR
CTL
CTU
Figure 1. Block Diagram (80XXX mode)
DATA CHANNEL
16 BYTE TRANSMIT
FIFO
TRANSMIT
SHIFT REGISTER
16 BYTE RECEIVE
FIFO
WATCH DOG TIMER
RECEIVE SHIFT
REGISTER
MRA0, 1, 2
CRA
SRA
INPUT PORT
CHANGE OF
STATE
DETECTORS (4)
IPCR
ACR
OUTPUT PORT
FUNCTION
SELECT LOGIC
OPCR
OPR
6
Product data sheet
SC28L91
TxDA
RxDA
7
IP0-IP6
8
OP0-OP7
V
CC
V
SS
SD00702
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