LG MG180C Service Manual page 31

3. H/W Circuit Description
3.5.5. Baseband Codec (BBC)
Baseband codec is composed of baseband uplink path (BUL) and baseband downlink path (BDL).
BUL makes GMSK (Gaussian Minimum Shift Keying) modulated signal which has In-phase (I)
component and quadrature (Q) component with burst data from DBB. This modulated signal is
transmitted through RF section via air. BDL process is opposite procedure of BUL. Namely, it performs
GMSK demodulation with input analog I&Q signal from RF section, and then transmit it to DSP of DBB
chip with 270.833kHz data rate through BSP.
From TSP
Burst
Buffer 1
From BSP
Burst
Buffer 2
3.5.6. Voltage Regulation (VREG)
There are 7 LDO (Low Drop Output) regulators in ABB chip. The output of these 7 LDOs are as
following table. (Figure14) shows the power supply related blocks of DBB/ABB and their interfaces in
MG180c.
Timing
Control
GMSK
Modulator
270 kHz
Figure 13. Baseband Codec Block Diagram
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6-Bit Offset
DAC Register
Cosine 10-Bit Low-Pass
Table
DAC
x
16 270 kHz
Sine 10-Bit Low-Pass
Table DAC
6-Bit
Offset
DAC Register
BULIP
Filter
BULIM
BULQP
Filter
BULQM