LG MG180C Service Manual page 27

3. H/W Circuit Description
• Six Low-dropout (LDO), linear voltage regulators targeted core, general I/O, memory I/O, SIM I/O
• High voltage (20V) Li-Ion or Ni-MH battery charging control
• Voltage detectors (with power-off delay)
• Voice Codec
Double
Bounding
Pads
BFSR
BDR
BFSX
BDX
CK13M
UDX
UDR
UEN
TMS
TCK
TDI
TDO
VCK
VFS
VDX
VDR
LEDA
LEDC
LEDB1
LEDB2
GNDL1
GNDL2
ON_nOFF
RESPWONz
CK32K
RPWON
PWON
ITWAKEUP
TESTRSTz
VREF
REFGND
IBIAS
DBBSCK
DBBSIO
DBBSRST
Figure 9. Top level block diagram of the IOTA(TWL3025)
VCMEM VRMEM VCDBB VSDBB
GNDD VLMEM VRRAM VRDBB
Voltage Regulation
Baseband
Serial Port
(BSP)
Clock Gene
(CKG)
Internal
MCU
Bus
Serial Port
Controller
(USP)
(IBIC)
Test Access
Port
(TAP)
Voiceband
Serial Port
(VSP)
Auxiliary
Drivers
(ACD)
Voltage
Reference
Power
Control
(VRPC)
SIM CARD
Interface
(SIM)
Battery Charger
Interface
(BCI)
SIMIO
SIMCK SIMRST
PCHG VCCS
ICTL
- 26 -
VRIO GNDA VCABB
VCIO VRSIM VRABB
(VREG)
Backup
(BREG)
APC
AFC
ADAC
Timing
Serial Port
(TSP)
Baseband
Codec
(BBC)
Voiceband
Codec
(VBC)
Monitoring
ADC
VBAT
(MADC)
VBACKUP
VCHG
ICHG
VBAT
VCHG VBATS
TESTV
VLRTC
VXRTC
VBACKUP
VRRTC
UPR
APC
AFC
DAC
TDR
TEN
TEST1/INT1
TEST2/INT2
TEST3
TEST4
BULIP
BULIM
BULQP
BULQM
BDLIP
BDLIM
BDLQP
BDLQM
EARP
EARN
AUXOP
AUXON
AUXI
HSO
HSMICP
HSMICBIAS
MICIP
MICIN
MICBIAS
GNDAV
ADIN1
ADIN2
ADIN3
ADIN4