Circuit Diagram - LG -A230 Service Manual

7. CIRCUIT DIAGRAM

IFX_XMM215x_NAND
BAT_TEMP
C128 4.7n
FM_ANT
RF_LB_TX
RF_VLOGIC
RF_LB_RXP
RF_LB_RXN
RF_HB_RXP
RF_HB_RXN
VDDTRX
RF_2G_BS
RF_HB_TX
RF_TX_EN
BT_RST_N
INDICATOR_1
HS_JACK_DET
INDICATOR_2
UART_TX
26MHz
UART_RX
X100 DSX321G-26M
BT_UART_RX
4 3
BT_UART_TX
1 2
USB_DP
EXXY0027001 USB_DM
VSIM_2V85
Connect GND plane directly
SIM_DATA
C134 SIM_CLK
0.1u SIM_RST
MSD_CMD
MSD_D[0]
MSD_CLK
MSD_D[1]
MSD_D[2]
MSD_D[3]
SIM_SELECT
JTAG_TDO
JTAG_TDI
JTAG_TMS
JTAG_TCK
JTAG_TRST_N
LCD_RST_N
BT_CLK_26M
R111 R112 R113
SIM_RST_SELECT
100K 100K 100K
BT_PCM_CLK
BT_PCM_SYNC
KEY_BL_EN
UART PORT
VBUS_USB VBAT
UA100
3G 2.5G
1
GND GND
2
RX RX
UART_RX
3
TX
TX UART_TX
4
VCHAR NC1
5 R117
ON_SW ON_SW F_BOOT
6 1K
VBAT VBAT
7
PWR NC2
8
URXD NC3
9
UTXD NC4 R118
10
DSR
11
RTS
12 100K
CTS
LGE Internal Use Only
RF SUPPLIES (CLEAN GND)
VBAT
VDDTRX VDDRF2 VBAT_RF2
PIN_B16 PIN_G15 PIN_G16
FB100
75
C109 C110 C111
C119
C120
1u 18p 220n
1u 470n
(10V)
VDD_IO_1V8
3.3u
22u
C121
VBAT
VBAT
C122 10u
N14 M0
T13
M1
R13
M2
N13
VDD_FMR
M12
FMRIN
M13
FMRINX
T17
CP1
R17
CP2 ABB
A17
TX1 RF
A16
FE2
D18
RX12
C18
RX12X
F18
RX34
E18
RX34X
C16
VDET
B15
PABS
C15
PABIAS
B18
FE1
B17
TX2
C14
PAEN
B16
VDDTRX
H10
USIF2_TXD_MTSR
VDDP_DIG1
J9
USIF2_RXD_MRST
EINT3
H9
USIF2_RTS_N
J10
USIF2_CTS_N
A4
USIF1_TXD_MTSR
U101
B5
USIF1_RXD_MRST
EINT2
A5
USIF1_RTS_N
B4
USIF1_CTS_N CC1CC6IO
K13
DPLUS
PMB8815
K14 VDDP_ULPI
DMINUS
B13
XOX
A13 RF
XO
M10
VSIM EUSY0429401
VDDP_SIM
E2
SIM_IO
D1
SIM_CLK
D2
SIM_RST
F1
MMCI_CMD
F3 VDDP_MMC
MMCI_DAT_0
F2
MMCI_CLK
G5
MMCI_DAT_1
G4
MMCI_DAT_2
E1
MMCI_DAT_3
H14
SWIF_TXRX
VDDP_DIG1
J17
TDO
J18
TDI
G18
TMS
H18
TCK
H17
TRST_N
K18
TRIG_IN
J15
MON1
J14
MON2
C6
MON3
G13
FSYS1
F13 RF
FSYS2
J13 CC0CC1IO
DIGUP_CLK VDDP_DIG1 VDDP_DIG1
VDDP_DIG2
H13
DIGUP1 CC0CC7IO
G12
DIGUP2 EINT4/EINT1
L10
LEDFBN
K12
LEDFBP
L11
LEDDRV
FC-135
X101
32.768KHz
C147
22p
EXXY0018701
RF SUPPLIES (DIRTY GND) DBB SUPPLIES
VDD_IO_1V8
VDD_IO1 VDD_IO2 VDD_EBU
VDDXO VDDTDC VDDMS VRF1
VDD_IO_1V8 VDD_IO_1V8 VDD_IO_1V8
R100
PIN_E13 PIN_B14 PIN_H15 PIN_H12
Seperate and shield 0
PIN G11 PIN K9
C112 C113 C114 C115 C116 C117
4.7n 47n 47n 1u 1u 0.1u
R101
470
LSCR523EBFS8 R102
EBK61572201 3.9K
3
1
R103
VBAT
Q100 VUSB_LDO_4V9
2
100K
(1%)
R104
5.6K
R5 NANDD_DDRA[00]
A_D0
N5
A_D1 NANDD_DDRA[01]
N3
A_D2 NANDD_DDRA[02]
M4
A_D3 NANDD_DDRA[03]
M1 NANDD_DDRA[04]
A_D4
P3
A_D5 NANDD_DDRA[05]
R3
A_D6 NANDD_DDRA[06]
R4
A_D7 NANDD_DDRA[07]
T3 NANDD_DDRA[08]
A_D8
M5 NANDD_DDRA[09]
A_D9
L5
A_D10 NANDD_DDRA[10]
N4
A_D11 NANDD_DDRA[11]
N6 NANDD_DDRA[12]
A_D12
P7 NANDD_DDRA[13]
A_D13
R1
A_D14 NANDD_DDRA[14]
M3
A_D15 NANDD_DDRA[15]
L1
A0 DDR_D[00]
VDDP_EBU
M2 DDR_D[01]
A1
J2
A2 DDR_D[02]
L3
A3 DDR_D[03]
K3
A4 DDR_D[04]
J1 DDR_D[05]
A5
K2 DDR_D[06]
A6
K4
A7 DDR_D[07]
H6
A8 DDR_D[08]
H1 DDR_D[09]
A9
H3 DDR_D[10]
A10
G3
A11 DDR_D[11]
G2
A12 DDR_D[12]
H2
A13 DDR_D[13]
H4 DDR_D[14]
A14
G6
A15 DDR_D[15]
A2 NAND_WP_N
FWP
VDDP_DIG1
B1 NAND_BSY_N
FCDP_RBn
N2 NAND_CS_N
CS0_n
R2 DDR_CS_N
CS1_n
R6
CS2_n
NAND_ALE_N
T4
ADV_n
P1 NAND_RD_N
RD_n
T5
WR_n NAND_DDR_WE_N
J8 NAND_CLE_N
WAIT_n
P2 DDR_RAS_N
RAS_n
P5 DDR_CAS_N
VDDP_EBU CAS_n
L2
BC0_n LDQM
J3
BC1_n UDQM
L4
BC2_n LDQS
G1 UDQS
BC3_n
J5 DDR_CLK_P
SDCLKO
T2
BFCLKO_0 VHS_MIC
J4 DDR_CLK_N
BFCLKO_1
DDR_CKE
P4 DNI DNI
CKE 47p 47p
VMAIN_MIC
P11
ANAMON
C136 C137 C138 C139
K17
VDDP_DIG1 FSYS_EN
BT_CLK_REQ
M17
ABB EPN
M18
EPP
R16
HSL
T16
HSR
N18
LSN
N17
LSP
R14
MICN1
T14
VDDP_DIG1 MICP1
R15
MICN2
T15
MICP2
P14
VMIC
P15
VUMIC
R12
ACD
P13
AGND C140 C141
C142 C143
T12
VREF 1n 1n
47p 47p
C146
VDD_IO_1V8
220n
PWRON
I2C_SDA
I2C_SCL
2 1
C148
UART_RX
22p
UART_TX
- 124 -
ABB SUPPLIES
PMU SUPPLIES
VBATSP
VBAT_PMU
VDD1V8CP
Speaker Supply
VDD_IO_1V8 VBAT VPMU_1V3 VAUX_2V85 VMMC_2V85 VUSB_3V1
VBAT
PIN N10 PIN P12 PIN P10 PIN L9 PIN M11
PIN P16
PIN F6,P6 PIN P18
C100 C101
C102 C103 C104 C105 C106
0.1u
C118 2.2u 2.2u 0.1u 470n 470n 0.1u
0.1u
(10V)
(10V)
Hynix 1G NAND/512M DDR
VDD_IO_1V8
U100 EUSY0425901
A8 J4
VDD1 A0
NANDD_DDRA[00]
C1 K1
C123 0.1u VDD2 A1 NANDD_DDRA[01]
G1 K2
C124 0.1u VDD3 A2 NANDD_DDRA[02]
G10 K3
VDD5 A3 NANDD_DDRA[03]
C125 0.1u
L1 B2
VDD4 A4
C126 1u NANDD_DDRA[04]
N8 C2
VDD6 A5 NANDD_DDRA[05]
D1
A6 NANDD_DDRA[06]
B9 C3
VDDQ1 A7 NANDD_DDRA[07]
C10 D2
VDDQ6 A8
NANDD_DDRA[08]
D9 C4
VDDQ5 A9
NANDD_DDRA[09]
E10 J3
VDDQ4 A10 NANDD_DDRA[10]
F9 E2
C127 0.1u VDDQ10 A11 NANDD_DDRA[11]
H10 E1
VDDQ9 A12
C129 0.1u NANDD_DDRA[12]
J9 H3
VDDQ2 BA0
C130 0.1u NANDD_DDRA[14]
K9 J2
C131 0.1u VDDQ8 BA1 NANDD_DDRA[15]
L10
VDDQ7
C132 1u
M9 K4
VDDQ3 DQ0 DDR_D[00]
K5
DQ1
DDR_D[01]
K6
DQ2 DDR_D[02]
A2 K7
NC27 DQ3 DDR_D[03]
D4
J8
NC20 DQ4 DDR_D[04]
D6 K8
NC21 DQ5
DDR_D[05]
E3 J7
NC9 DQ6
DDR_D[06]
E4 J5
NC19 DQ7 DDR_D[07]
E5 E6
NC8 DQ8 DDR_D[08]
E7 C5
NC11 DQ9
DDR_D[09]
E8 D8
NC12 DQ10
DDR_D[10]
F1 C6
NC17 DQ11 DDR_D[11]
F3 C8
NC18 DQ12 DDR_D[12]
F4 C7
NC7 DQ13 DDR_D[13]
F5 B8
NC16 DQ14
DDR_D[14]
F6 B7
NC25 DQ15 DDR_D[15]
F7
NC6
G3 G8
NC10 /CK DDR_CLK_N
G4 F8
NC5 CK
DDR_CLK_P
G5 D3
NC13 CKE
DDR_CKE
G6 H2
NC14 /CS
G7 F2
NC4 /RAS DDR_RAS_N
H4 G2
NC2 /CAS
DDR_CAS_N
H5 J1
NC24 /WED
NAND_DDR_WE_N
H6 D7
NC22 UDQM UDQM
J6 H8
VDD_IO_1V8 NC23 LDQM LDQM
L3 D5
NC15 UDQS UDQS
L4 H7
NC3 LDQS
LDQS
C133 0.1u
A5 M1
VCC1 IO0
NANDD_DDRA[00]
C135 0.1u M5 M2
VCC2 IO1
NANDD_DDRA[01]
M3
IO2 NANDD_DDRA[02]
L5
IO3 NANDD_DDRA[03]
N7
IO4
NANDD_DDRA[04]
L6
IO5 VDD_IO_1V8
NANDD_DDRA[05]
A9 M6
VSS1 IO6 NANDD_DDRA[06]
B1 L8
VSS4 IO7 NANDD_DDRA[07]
B5 N2
VSS8 IO8 NANDD_DDRA[08]
B10 N3
VSSQ5 IO9
NANDD_DDRA[09]
C9 M4
VSSQ4 IO10 NANDD_DDRA[10]
D10 N4
VSSQ9 IO11 NANDD_DDRA[11]
E9 N5
VSSQ8 IO12 NANDD_DDRA[12]
F10 M7
VSSQ3 IO13
NANDD_DDRA[13]
G9 L7
VSS2 IO14
NANDD_DDRA[14]
H1 M8
RCV_SPK_N
VSS3 IO15 NANDD_DDRA[15]
H9
RCV_SPK_P
VSSQ10
J10 A6
HS_L VSSQ1 /CE
K10 A3
HS_R VSSQ2 /RE
L2 A7
VSS5 /WE
L9 A4
VSSQ6 CLE
M10 B4
VSSQ7 ALE
N6 B3
VSS6 /WP
MAIN_MIC_N
N9 B6
MAIN_MIC_P VSS7 R/B
HS_MIC_N
HS_MIC_P
bga130p_p_65w8x9h1_0_r
VDD_IO_1V8
JTAG_TRST_N
JTAG_TDI
JTAG_TMS
JTAG_TCK
JTAG_TDO
RESET_N
(FOR SW DEBUGGING / NOT MOUNTED)
TP111 ON BOARD ARM9 JTAG & ETM INTERFACE
TP112
ON BOARD UART/USB INTERFACE
TP114
PWRON
OJ101 OJ102 OJ103
Copyright © 2011 LG Electronics. Inc. All right reserved.
7. CIRCUIT DIAGRAM
BACK UP Capacitor
VCORE_1V2
VRTC
PIN K10
PIN L12
C107 C149
C108
220n 0.1u
10u
NEAR DBB
VDD_IO_1V8
DDR_CS_N
NAND_CS_N
NAND_RD_N
NAND_DDR_WE_N
NAND_CLE_N
NAND_ALE_N
NAND_WP_N
NAND_BSY_N
CN100
1
2
3
4
5
No SR Open
6
7
8
9
C150
0.1u
Only for training and service purposes