Roland TR-808 Service Notes page 2

TR-808
JUN.
15,
1981
(Top VievV;
A.
—
1
-vy-
18
As
2 17
A4
3 16
A3
4 15
Ao
5 14
Ai 6
13
A2
I
7
12
CS
8
11
GND
—
9
10
Vcc
Ar
Af
A9
I'Oi
I
O2
I
O3
I
Oi
We
HIV14334P-4.
1
024-word
X
4-bit
Static
CMOS RAM
A3
As
Ab
A:
As
lOi
I
O2
I
O3
I
O4
7^
;^
I
CS
WE
ROW
SELECT
MEMORY ARRAY
64
ROWS
64
COLUMNS
INPUT
DAH
CONTROL
1^
\'cc
GND
SENSE SWITCH
COLUMN SELECT
MM
Ao Ai A2 A9
t''^)
'^^^^ ^~
<^^a
Tao^i
Mn
n n n n n
n
c
- + -yo
mo^y
(D
®
BA662
jtnytnTarnjj
MC14001BCP
Quad
2-lnput
NOR
Gate
IN
^W
- +
o
n n n n
w^
m
u u u
u
-
+_
<JV
TC4011BP
Quad
2-lnput
NAND
Gate
IN
/^PC4558C
TA7179P
DUAL
±15V
TRACKING RAGULATOR
VOLTAGE
GND
li
\j
"?1
ADJUST
BALANCE 5 5 NC
+
COMPEN
D
ff
- COMPEN
+
SENSE
S
S
- SENSE
+
VOUT
5 n
-
VOUT
NC U D NC
VCC
Q_
n VEE
Heg.IN
=
5raV(typ)(VIN.=i8-30Vj
Reg,OUT= 5mV(typ)(IOUT=0-50mA}
Ripple rejection ratio
=
'f5dB
Output current
= 100mA (max)
-u
-r-i
2
3
I
r
OUTPUT
—
-
-^
--».
(
-
^
^»_/H/IIVHJIM
(
-
—
=<
{
^
==».
V
^ INPUT
ORDER
INFORMATION
OUTPUT
VOLTAGE
TYPE
PART
NO.
5
V
MA7805C
MA7805UC
6
V
MA7806C /iA7806UC
8
V
MA7808C
MA7808UC
8.5
V
MA7885C ;iA7885UC
12 V MA7812C
MA7812UC
15
V
MA7815C MA7815UC
18
V MA7818C
;jA7818UC
24
V
MA7824C PA7824UC
MA7800 SERIES
3TERMINAL
POSITIVE
VOLTAGE
REGULATORS
ABSOLUTE
MAXIMUM
RATINGS
Input Voltage
(5
V through 18 V)
(24 V)
Internal
Power
Dissipation
Storage Tennperature Range
Operating Junction
Temperature Range ;iA78O0
/iA7800C
Lead Tennperature (Soldering,
60
s
time
limit)
TO-3 Package
(Soldering, 10
s
time limit)
TO-220 Package
35
V
40
V
Internally Limited
-65°C
to
+150°C
-55°C
to
+150°C
0°C
to +150''C
300°
C
230''C
HD14S84B
Hex
Schmitt
Trigger
MC14051B
8-Channel Analog
Multiplexer/Demultiplexer
H-
E-
E
"V^
[T-^x^
AN69I2
Quad
Comparator
BLOCK DIAGRAM
Vdd
'
P'"
14
-f^>o
—
loj
I}"
feo-
Inhibit
,..
J
110
—
A
lOO
—
B
9
O
C
'l3
0—
XO
140
XI
X2
X
tches
<
120
X3
Oi/t
10 X4
50
X5
20
X6
40
X7
1
VDD '
f^in
lb
Vss =
Pin 8
Vee -
Pin 7
TRUTH TABLE
Control Inputs
1
Inhibit
Select
ON
Switches
|
C*
B
A MC14051B MC14062B WIC14053B
1
1
1 1
XO
X1
X2
X3
YO XO
Y1 XI
Y2 X2
Y3 X3
ZO YO XO
ZO YD XI
ZO Y1 XO
ZO Y1
xr
1
1 1
1 1
1
1 1
X4
X5
X6
X7
ZI YO XO
ZI
YO XI
21 Y1
XO
ZI Y1 XI
1
X X X
None None None
Not applica
•
Don't Ca
MC14051B FUNCTIONAL DIAGRAM
16
oVqd
8 6 Vss 7
Jv
3inary to
loi
Decoder w
Inhibit
th
MC14013B
DUAL TYPE D FLIP-FLOP
TRUTH TABLE
INPUTS OUTPUTS
1
CLOCK* DATA RESET SET Q
_/~
1
_y~
1 1
~\_
X Q
Q
X X
1 1
X
X
1 1
X X
1 1 1 1
X
"
Dont Cue
t
- Level Change