Pin Configuration - LG PFM42V1 Service Manual

PIN CONFIGURATION

C O N T R O L S
Q O 2 51
Q O 3 52
Q O 4 53
Q O 5 54
Q O 6 55
Q O 7 56
O VCC 57
O GN D 58
Q O 8 59
Q O 9
60
Q O10
61
Q O11
62
Q O12
63
Q O13
64
Q O14 65
Q O15 66
V C C 67
GND 68
Q O16 69
Q O17 70
Q O18 71
Q O19 72
Q O20 73
Q O21 74
Q O22 75
PIX S
H S_DJTR
O C K _I N V
Termination
EX T_RES
Control
RX 2+
Data Recovery
VCR
CH2
RX 2-
RX 1+
Data Recovery
VCR
CH1
RX 1-
RX 0+
Data Recovery
VCR
CH0
RX 0-
RX C+
VCR
PLL
RX C-
PDO
STAG_O UT
ST
SIL161BCT100
G PO E V E N 8-bits RE D
SiI 161B
100-Pin T QFP
(Top V iew)
D I F FE R E N T I A L SI G N A L
PIN CONFIGURATION
SYNC2 SYNC2
Channel
SYNC1 SYNC1 Decoder
SYNC
SYNC0 SYNC0
BLOCK DIAGRAM
- 45 -
25 Q E13
24 Q E12
23 Q E11
22 Q E10
21 Q E9
20 Q E8
19 OGND
18 O VCC
17 Q E7
Q E6
16
Q E5
15
Q E4
14
13 Q E3
12 Q E2
11 Q E1
10 Q E0
9 PDO
8 SCD T
7 STAG_OUT
6 V C C
5 GND
4 PIX S
3 ST
2 PD
1 H S_DJTR
PLL
DA TA
24
Q E[23:0]
CTL3
24
Q O [23:0]
CTL2
O DCK
Panel
DA TA
DE
Inter-
H SY NC
CTL1
face
VSYN C
Logic
DA TA SCDT
CTL1
VSYN C
CTL2
HSYN C
CTL3