Block Diagrams; Bd Section - Sony MDS-W1 Service Manual

Minidisc deck
Hide thumbs Also See for MDS-W1:
Table of Contents

Advertisement

6-2. BLOCK DIAGRAMS

– BD SECTION –
• Deck B is omitted.
HR901
• Signal path
OVER WRITE
HEAD
: PB (DECK A)
HEAD
DRIVE
: REC (DECK A)
Q181,182
: PB (DECK B)
: PB (Digital out)
: REC (Digital in)
OPTICAL PICK-UP BLOCK
(KMS-260A/J1N)
I
1
J
2
DETECTOR
F
I
C
B
J
D
A
A
4
E
B
5
C
6
D
7
E
8
F
9
VC
VC
VC
3
TEMPR
15
D101
TEMPI
14
LASER ON
PD
PD
SW
10
Q101
ILCC
APC
LD
Q162,163
HF MODULE
HF
SW
MODULE
IC103,Q102-104
TRACKING
SLED/SPINDLE MOTOR DRIVE
COIL
FOCUS/TRACKING COIL DRIVE
IC152
FOCUS
TRK–
COIL
10
TRK+
DRIVER
12
FSC+
21
FSC–
DRIVER
23
SLED+
M102
M
27
DRIVER
SLED MOTOR
SLED–
25
SPDL+
M101
M
6
DRIVER
SPDL–
SPINDLE MOTOR
8
09
OVER WRITE HEAD DRIVE
IC181
9
8
12
10
11
1
3
13
2
4
6
5
RF AMP
IC101
48 47 46 40
RF
RF AGC & EQ
38
RF AMP
BPF
P-P
AUX
33
BOTM
PEAK
36
&
PEAK
37
BOTTOM
ABCD
ABCD
35
AMP
IV AMP
FOCUS
FE
ERROR
34
AMP
IV AMP
ADAGC
31
VC
AT
BPF
29
AMP
E-F
ADFM
BALANCE
ADIN
30
VCC
ADFG
CVB
32
TE
TRACKING
26
ERROR
SE
28
AMP
TEMP
AMP
CSLED
27
VC
SWDT
SERIAL
16
SCLK
17
VICONV
PARALLEL
XLAT
18
DECODER
FOCNT
20
11
12
22 23
25
TFDR
14
TRDR
15
FRDR
18
FFDR
19
SFDR
29
SRDR
30
SPFD
3
SPRD
4
XRST
16
PSB
– 51 –
DIGITAL SERVO SIGNAL PROCESSOR, DIGITAL SIGNAL PROCESSOR
EFM/ACIRC ENCODER/DECODER, SHOCK-PROOF MEMORY CONTROLLER,
ATRAC ENCODER/DECODER
IC121
15
14
EFMO
100
EFM,
SHOCK
PCO
ACIRC,
RESISTANT
59
ENCODER/
MEMORY
FILI
60
DECODER
CONTROLLER
PLL
FILO
61
CLTV
62
RFI
57
AUX1
67
BOTM
64
PEAK
63
ANALOG
ABCD
MUX
65
FE
66
VC
VC
68
TE
75
A/D
SE
CONVERTER
74
SERVO
ADFG
ADIP
78
DECODER
SPINDLE
PWM
SERVO
GENERATOR
DTRF
82
CKRF
81
XLRF
80
FOCNT
79
93
94
95
10
13
83
88
89
86
85
DADTI
22
(From Deck B)
DIN0
19
DIN1
DIN1
20
(From Deck B)
ADDT
25
DIGITAL
AUDIO
I/F
ATRAC
ENCODER/
DECODER
DADT
26
DOUT
21
XBCK
28
LRCK
SAMPLING
27
CLOCK
RATE
GENERATOR
CONVERTER
OSCI
16
7
XBCKI
23
BUFFER IC123
LRCKI
24
SQSY
11
SUBCODE
DQSY
PROCESSOR
12
MNT3
4
MNT2
3
MONITOR
MNT1
CONTROL
2
MNT0
1
SENS
9
SRDT
8
SCLK
CPU
6
DSP
I/F
SWDT
5
XLAT
7
3
DRAM
AUTO
IC124
SEQUENCER
XWE
20
47
3
XWE
XRAS
46
4
XRAS
XCAS
44
17
XCAS
XOE
43
16
XOE
1
DQ1
2
18
19
DQ4
D0
D3
A00
A09
6
A0
92
91
49 • 48 • 50 • 51
34 31 • 36 40 • 45
9
11
15
5
A9
5
SDA
EEP ROM
IC171
SCL
6
DETECT SW
S101, S102,
S601-604
M103
M
LOADING MOTOR
– 52 –
MDS-W1
DIN0
ADDT
A
DADT
INPUT/OUTPUT
SECTION
(Page 53)
DOUT
BCK
LRCK
3
MCLK
BCKI
LRCKI
SQSY
DQSY
MNT3
MNT2
MNT1
MNT0
SENS
SRDT
SCLK
SWDT
XLATCH
SCTX
XINT
B
CONTROL
SECTION
(Page 55)
LDON
WRPWR
MOD
SDA
SCL
LIMIT-IN
REFLECT
PROTECT
CHUCK IN
PACK OUT
PB P
REC P
LOAD-IN
LOAD-OUT
DIG-RST

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents