Sony DSX-A40UE Service Manual page 24

DSX-A40UE/A40UI/A42UI
Pin No. Pin Name
78, 79 VVDD2, VVDD3
80 DVSS
81 DVDD
82 CP-SCL
83 CP-SDA
84 CP-nRES
85 NC
86 CMDERR
87 TEST0 (GND)
88 DVDD
89 DVSS
90 DVDD15
91 JTRSTB (IPD)
92 JTCK (IPD)
93 JTDI (IPD)
94 JTMS (IPU)
95 JTDO (O)
96 JTRTCK (O)
97 TEST1 (GND)
98 AVDD1
99 AVSS1
100 LRREF
24
I/O
- Power supply terminal (+3.3V) (for PLL)
- Ground terminal (for digital system)
- Power supply terminal (+3.3V) (for digital system)
O Serial data transfer clock signal output to the EEPROM
I/O Two-way serial data bus with the EEPROM
O Reset signal output terminal
- Not used
O Command error signal output to the system controller
I Test mode setting terminal
- Power supply terminal (+3.3V) (for digital system)
- Ground terminal (for digital system)
- External capacitor connection terminal for internal regulator
I Reset signal input terminal (for JTAG)
I Clock signal input terminal (for JTAG)
I Data input terminal (for JTAG)
I Mode selection signal input terminal (for JTAG)
O Data output terminal (for JTAG)
O Return clock signal output terminal (for JTAG)
I Test mode setting terminal
- Power supply terminal (+3.3V) (for A/D converter)
- Ground terminal (for A/D converter)
External capacitor connection terminal for audio D/A converter and electrical volume reference
-
voltage
Description
Not used
"H": error
Fixed at "L"
Normally: fi xed at "L"
Normally: fi xed at "L"
Normally: fi xed at "L"
Normally: fi xed at "H"
Normally: open
Normally: open
Fixed at "L"