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SECTION
IV
THEORY
OF
OPERATION
4.1
General
This section provides
a
generalized description
of the 1178
circuitry and should be used
in
conjunction with
the schematic at
the end of the manual.
Where
used,
component designations
in
parenthesis are those
of
channel
B.
4.2
INPUT
AMPLIFIER
The audio signal
is
applied through the rear panel barrier
strip
to
a
differential input
eutnplifier
IC
1,
section A
&
B (IC
2,
A
&
B).
This input can accept either balanced
or
unbalanced signal
sources.
When
used
in an
unbalanced
mode, either the COM terminal
or the
"i"
terminal
is
connected to ground, the latter causing
a
polarity reversal
(180® out of phase) of
input versus output signal.
(See
Installation, Section
2.5).
Common mode rejection
is
factory trimmed with
R1 (RlOl), and
is
typically better than
60 dB.
4.3
VOLTAGE-VARIABLE RESISTOR ATENUATOR
The input signal
is
coupled from the differential amplifier
through the Input Level control
to an
"L"
section consisting
of R3
(R103) as the
series element and field-effect transistor Q7A
(Q7 b)
as
the
voltage- variable shunt element.
Below the threshold
of
limiting the FET has
a
very high resistance.
During limiting the
gain reduction amplifier causes
the FET to conduct, decreasing its
resistance proportionately.
The Q-bias network
R12, R13,
R14
is
adjusted to bring the FET into the region of conduction.
4.4
SIGNAL PREAMPLIFIER
This low noise amplifier stage provides approximately
28
dB of
gain.
Trimpot R18
(R118) in the
feedback loop
is
used to adjust
the circuit for
a
minimum
of
distortion products due
to channel
non-linearity in
the FET.
The preamplifier output signal
is
applied simultaneously to the Output Level control
and
to the
ratio switch
for use in the
gain reduction amplifier.
4.5
LINE AMPLIFIER
The signal from the output control
is
coupled to the output
amplifer consisting of
IC 2A, Ql,
Q2
(IC 4B, Q4,
Q5
)
and associated
components, and
hence
to the
output transformer
T2.
This circuit
-
17
-
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