Toshiba TCL M28LG2 Service Manual page 13

Basic Structure
1. Internal Connections
TMPA8873 has two pieces of IC chip in one package, using Multi-Chip-Package (MCP) technology. One is a
micro controller (MCU) and the other one is a signal processor (SP) for a color TV. There are some internal
connections between these two ICs for handling below signals.
Signal Name
1 SCL
2 SDA
3 OSD R
4 OSD G
5 OSD B
6 OSD Y/BL
7 OSD I, CS OUT
8 C-Video
9 C-Sync
10 HD
11 VD
12 CLK
13 AV
DD
14 ADC
Functions of SP from MCU are controllable through the IIC bus of the internal connections.
2. Power Supply
TMPA8873 has some power supplies and GND pins. Power supplies related MCU must be applied at the
first. Power supplies for H.V
The other power supplies are the last, which are recommended to be supplied from a regulator circuit using
FBP.
3. Crystal Resonator
TMPA8873 requires only one crystal resonator, in stead that a conventional two-chip solution requires two
resonators at least, one for MCU and the other one for SP. An oscillation clock with the crystal resonator of
TMPA8873 is supplied for MCU operation, PIF VCO automatic alignment, alignment free AFT, chroma
demodulation and horizontal oscillation. The oscillation frequency is very important so that those of functions
work properly, so that designing the oscillation frequency accurately is required. The spec of crystal is
recommended to be within
: 8 MHz +/−20 ppm
f
osc
ftemp: 8 MHz +/−40 ppm (−20°C to +65°C)
While RESET of MCU is active, the MCU function stops. Hardware and software initialization sequence
including power supplies control is required, because status of any hardware after the RESET period is
unknown especially horizontal oscillator which is a very basic timing generator of SP operation.
Direction
M to S Internal IIC bus SCL
Bi-direction Internal IIC bus SDA
M to S OSD signal connection
M to S OSD signal connection
M to S OSD signal connection
M to S OSD display control
M to S OSD half-tone control/Test pattern signal
S to M Composite video signal from internal video switch, for CCD
S to M Composite sync. signal from sync. Separator, for CCD
S to M Horizontal timing pulse regenerated from FBP, for OSD
S to M Vertical timing pulse from sync. Separator, for OSD
M to S 8 MHz clock
M to S Reference voltage for C-Video interface
S to M A/D converter monitoring RF-AGC, R-Y and B-Y
and TV D.V
CC CC
Confidential
Description
are the second with at least 100 ms delay after MCU power ON.
4
TMPA8873CxBNG
Tentative Tentative
Tentative Tentative
2006/05/25