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Co-Operator
TECHNICAL DATA
6-9
ICllOa and
diode-connected
transistor
Q104
form
a precision
clamp
that
prevents
the
gain
control voltage
from
going
below
ground.
The
gate
is
activated
when
the
output of
IC
11
5b
at
pin 7
is
negative,
and
defeated
when
it
is
positive.
The
input
level
detector
is
a half-wave negative
peak
detector,
consisting
of
IC115a and
associated
components.
The
input
line
is
connected
to the
+
input
of
IC115a
at
pin
3.
IC115a's
pin
1
output charges
C106
through
CR101
and R108.
The
voltage across
006
is
fed
back
to
IC115a's -
input
(pin 2)
through voltage
divider
R107, R106, which
also serves
to
discharge
006
in
the
absence of
signal,
thus
determining
the
recovery time of
the detector.
The
voltage
at
006
(representing
46 *
the
negative
peak
value of
the
Co-
Operator's input
signal
after
input attenuation)
is
applied
to the
-
input
of
IC115b
at
pin
6.
IC115b
is
operated
as
a
comparator with
hysteresis.
The
comparator
threshold
is
a
voltage
developed
at
IC115b's +
input (pin 5)
through
resistor
network R109, R110, Rill, R112, and
L GATE THRESH
control
R113.
When
the voltage
at
IC115b's -
input
(pin 6)
is
more
positive
than
the
voltage
at
its
+
input,
ICllSb's
pin
7 output goes negative
and
the
gate
turns on.
Feedback
for hysteresis
is
provided through
R110.
The
nega-
tive
threshold voltage
at
IC115b's
+input
(pin 5)
is
adjusted
by R113.
R109
is
connected
to
the
+15V
supply
to
ensure
that
turning
R113
fully
counter-
clockwise
will force the
voltage
at
IC115b's +
input
(pin 5)
slightly
positive
and
turn the
gating function
off,
since the voltage across
C106
(applied to
IC115b's
-
input
at
pin 6)
can never
go
positive.
In
gated
conditions,
Q103
is
pinched
off
by
pulling
its
gate
to
a
high negative voltage through
CR102.
This
opens
the release
time path
and
permits
ICllOb
(pin 7)
to inject
a voltage
into
R154
that
forces the
output voltage
of
the
timing
module
to
drift
towards
the
average of
the
last thirty
seconds of gain
control voltage.
In
ungated
conditions,
CR102
is
off,
Q103's
gate
is
clamped
to
the
same
voltage
as
its
source through
R155, and
Q103
becomes
equivalent
to
a
low
resistance.
Since
Q103's
source
is
driven
from
a
low
impedance,
the
effect
of
R154
is
entirely
swamped
out,
and
RELEASE TIME
control
R157
is
permitted
to
conduct
normally.
The
dB-linear gain reduction voltage
is
attenuated
by R210,
R209
such
that
+3V =
25dB
gain
reduction.
The
attenuated voltage
is
mixed
with
a
50
or
60Hz
"dither" signal
through
C128,
R211
(connected
to
the
power
trans-
former
secondary),
and
then applied
to the
input
of
LM3914
bargraph
driver
IC116.
The
LM3914
bargraph
consists
of
ten
comparators with
current regulators
at
their
outputs.
The
comparators
are
arranged
to
produce a meter with a
linear
scale.
The
LM3914
applies current (through
any one of
pins
1
through
10)
to
the appropriate
node
to
light
the desired
LEDs.
Q107
is
used
as
a
zener diode
to
reduce
the
supply voltage
to
the
LM3914
so
that
it
is
within the
chip's
25V maximum
rating.
R212
sets
the current
through
the
LED
bargraph.
The
LM3914
has
an
internal string
of
series resistors that
provide reference
voltages for
its
ten
comparators.
The
bottom
of
this
string
is
grounded
at
pin
4; the
top
of
the
string
is
provided with
+3.00VDC
from
pin
1
of IC6a.
C127
bypasses
the
LM3914
power
supply
to
prevent
the
LM3914
from
os-
cillating.
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