Unequal-Pole-Closing-Load Pickup Logic; Loss-Of-Load Accelerated Trip Logic - ABB REL 301 Instruction Leaflet

and a common set of voltage transformers. Each relay trips the main breaker and the power
transformer secondary breaker, for faults on the line section being protected (e.g. relay #2 trips
52 and 52-2). Classic close into fault logic produced false tripping of one secondary breaker
(transformer on the unfaulted line section) upon reclosing after a trip, if the fault persisted. This
was due to 'arming' of the non-directional, close into fault logic by the common (main breaker)
52b, in the relay which did not detect the fault.
The 200/0 millisecond timer delays the 'arming' and hence operation of the close into fault logic
during main breaker reclosing. The choice of 200 milliseconds was selected to be greater than
the 180 milliseconds reset of the 52b, but less than minimum reclose dead time of an instanta-
neous reclose. To utilize this logic, the following application rules apply:
1) For relay 1 with "bus-side potential", that is cts and vts on the same side of the main break-
er, set "CIF Trip" to "No CIF Trip". When bus-side potential is used, close into fault logic
is not needed and could misoperate, under certain circumstances, if enabled.
2) For relay 2 with "line-side potential", that is cts and vts on opposite sides of the main break-
er, set "CIF Trip" to "CIF Trip w/delay". The minimum reclose 'dead' time must be greater
than 200 milliseconds or close into fault tripping will be delayed, and it is possible no close
into fault trip will occur when reclosing onto a fault.
3) Loss of potential block logic, "LOP Blk" must be set to "Yes" or "No" not "ALL". For the
setting of "LOP Blk" "ALL", the relay may not trip during reclosing onto fault since loss of
potential may set and block tripping.
Standard close into fault trip logic, without time delay, should be selected for all applications with
line side potential other than this two-relay-one-breaker scheme configuration.
2.4.8 Unequal-Pole-Closing-Load Pickup Logic (Figure 2-16)
The ground units may pick up on a condition of load pickup or with unequal breaker pole closing.
The high speed ground units (Z1G, FDOG and PLTG) should be supervised under this condi-
tion. This supervision is achieved by inserting a 0/20 millisecond timer, controlled by the 52b
signal, to supervise the Zone-1G trip via AND 3 (Figure 2-5) PLTG trip via AND 189A (Figure
2-20). It should be noted that the 20 ms time delay will have no effect on a normal fault clearing.
2.4.9 Loss-of-Load Accelerated Trip Logic (LL Trip Figure 2-17)
NOTE: The LL Trip function does not need to be set for normal operation of the relay.
Load loss accelerated tripping is "acceleration of" or bypassing the remainder of the normal
zone-2 time delay after a fault is sensed in zone-2 and the logic detects 3-pole tripping at the
remote terminal. Acceleration occurs for all fault types, except 3Ø faults, to improve trip speed
for the sequentially tripping terminal.
During non-fault conditions, balanced 3Ø current flowing results in IAL=IBL=ICL= logic "1"
which produces a logic 1 at the output of AND 24 and OR 13. For a remote fault (beyond zone-1
reach), Z2P OR Z2G detects the fault which satisfies an input to AND 25. However, the signal
from AND 24 is negated at it's input to AND 25, therefore, AND 25 should have no output until
the remote end 3-pole trips. At this time, the local end current will lose one or two phases, de-
While it can provide faster tripping for end-zone faults, it may not be used in all
situations. It should be applied with caution based on thorough knowledge of the
system characteristics where the relay is applied. It is definitely not applicable
where maximum tapped load may exceed minimum through-load in the protect-
ed line.
I.L. 40-386.4
2-9