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R80
(through
which
the threshold current
is
removed)
is
fed
from
the output
of
1C
I
A,
which
supplies
a threshold voltage
which
is
varied
in
ways which
will
be
described below. For
the
moment,
observe
that adjusting
R79a
will
vary the
amount
of
current
removed from
ICIOA's
summing
junction, thus
lowering the
compression
threshold
when
the attack
time
is
lengthened.
ICIOA
and
associated
components
are
essentially
a
current-in,
current-out
circuit
with
adjustable current
gain.
The
current
input
is
ICIOA's
(-)
input;
the current
output
of
the
circuit
is
the
collector
of
ICIOA's output
transistor.
This
output
current
is
further
applied
to
a three-transistor
Wilson current mirror within IC3
which
inverts
and
level-shifts
the current
so
that
the
final
output current flows
from
pin 9 of
IC3
into
the timing
module.
The
output
current
of
the
circuit
is
essentially
equal but opposite to the current
flowing
into
the emitter
of
ICIOA's output
transistor.
This current
is
the
sum
of
the
current flowing through
R75
and
the current flowing through the
R75
side
of
R79a.
When
the
wiper
of
R79a
is
far
from R75, ICIOA
(through
its
output
transistor)
behaves
like
a high-gain
inverting
amplifier,
forcing
a considerable voltage drop
across
R75,
and
therefore
resulting
in
a high current
through
R75
and
high
current
gain
in
the
circuit.
This
corresponds
to a fast
attack time.
As
the
wiper
of
R79a
is
moved
closer
and
closer
to
R75,
the
inverting
gain
decreases and
the attack
time
lengthens. Simultaneously,
the threshold decreases.
When
the wiper of
R79a
is
almost
at,
or
at
its
R75
endstop, a
minimum
current
gain
of
approximately
lx
is
achieved.
At
this point,
the
offset
introduced
into
the
(+)
input of
ICIOA
by
voltage
divider
R77,
R78
(as
fed by the threshold voltage)
comes
into play to swiftly
and
radically
lower
the
rectifier
threshold
by causing a current flow through
R75
which almost
balances the
current
flow out
of
R80.
This
keeps
the
peak
output
level
of
the
compressor/limiter
approximately
constant,
as
extremely
slow
attack
times
are
rather
abruptly
produced
as
R79a's wiper
comes
close
to
the
R75
endstop,
and
these
attack
times
must
be
complemented
by
large
decreases
in
threshold.
It
should be noted
that
ICIOA must
have
offset of
less
than
ImV
for
this
scheme
to
work
reliably,
and
it
is
therefore important
to
replace
ICIOA
by an
identical
1C
in
case
of failure.
Timing Module:
Pin
9
of
IC3 feeds
the
compressor/limiter
timing
module.
This
module
contains
proprietary circuitry
which
receives
the
input
current
from
the
rectifier with threshold,
and
outputs
a control voltage
with appropriate
dynamics
to
achieve
natural-sounding
control
and
very low modulation
distortion.
The
output
of
the
module
is
a
low-impedance
unidirectional
voltage
source
which can
be
wire-"OR"ed
with other
such
modules
to
effect
stereo
tracking
of
an
arbitrary
number
of
channels.
The
RELEASE
TIME
control
R68
allows
a
20:1
variation
in
the
basic
release
dynamics, which
are
determined by
the timing
module on
the
basis of
the
past
history
of
the
input.
When
the gating
FET Q4
is
turned
OFF
by
pulling
its
gate
towards +15
volts,
voltage
is
forced
into
the timing
module from
the
IDLE
GAIN
control
R72
through
R70. The
setting of
this
control
determines
the output voltage
of the timing
module
under gated
conditions.
When
the
COMP
OPerate/DEFEAT
switch
is
DEFEATed,
the
same
voltage
is
forced
into
the
module
through
a
smaller
resistor
R69, and
the
module
output
voltage
quickly
approaches
the voltage
at
the wiper
of
the
IDLE
GAIN
control.
35
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