Special-Purpose Lines; Data Handshake Methods - HP 9000 Series 300 Tutorials Manual

The Peripheral Control (PCTL) line is controlled by the interface and used to
initiate data transfers. The Peripheral Flag (PFLG) line is controlled by the
peripheral device and used to signal the peripheral's readiness to continue the
transfer process. The Input/Output (I/O) line is used to indicate direction of
data flow.
Special-Purpose Lines
Four lines are available for any purpose you desire; two are controlled by the
peripheral device and sensed by the computer, and two are controlled by the
computer and sensed by the peripheral.
Data Handshake Methods
There are two handshake methods using PCTL and PFLG to synchronize data
transfers: pulse-mode handshakes and full-mode. If the peripheral uses pulses
to handshake data transfers and meets certain hardware timing requirements,
the pulse-mode handshake is used. The full-mode handshake should be used if
the peripheral does not meet the pulse-mode timing requirements. Refer to the
GPIO interface's documentation for a description of these handshake methods.
Data-In Clock Source
Ensuring that data is valid when read by the receiving device differs slightly
depending on what direction the data is flowing. When writing data out from
the computer the interface generally holds data valid while PCTL is in the
asserted state, the peripheral must read the data during this period.
When reading data from the peripheral, the peripheral must hold the data
valid until it can signal that the data is valid or until the data is read by the
computer. The peripheral signals that the data is valid using the PFLG line.
This clocks the data into the interface's Data-In registers.
You can specify the logic level of the PFLG line that indicates valid data
by setting the FLAG switches on the interface card. Refer to the card's
installation manual to find out how to do this.
Series 300 Dependencies A-3