Hisense LCD42P69P Service Manual page 50

5
5V_M
AMUX_5V
FBA1 FBA1
D
0603_Bead 0603_Bead
CA69 CA69
+ +
CA68 CA68
4.7uF/16v 4.7uF/16v
0.1uF 0.1uF
AV1_L C415 C415 2.2uF 2.2uF
AV2_L C354 C354 2.2uF 2.2uF
Y1_L C381 C381 2.2uF 2.2uF
Y2_L C396 C396 2.2uF 2.2uF
AV1_R C397 C397 2.2uF 2.2uF
AV2_R C383 C383 2.2uF 2.2uF
Y1_R C412 C412 2.2uF 2.2uF
Y2_R C413 C413 2.2uF 2.2uF
MUX_CTLA R331 100 R331 100
MUX_CTLB R397 100 R397 100
AMUX_5V AMUX_5V
C
RA9 RA9 RA10 RA10
10K 10K 10K 10K
MUX_CTLB MUX_CTLA
RA13 RA13
QA3 QA3 1 PWM3 QA4 QA4 1
3904 3904 3904 3904
10K 10K
B
C353 C353
SPDIFOUT R343 R343 33 33
D141 D141
0.1uF 0.1uF
R465 R465
C351 C351
33pF 33pF
100/NC 100/NC
EZJZ0V800AA EZJZ0V800AA
A
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5
4
CA71 CA71
100uF/16v 100uF/16v CA70 CA70
0.1uF 0.1uF
AMUX_5V
R398 R398 10K 10K
+ + CA21 CA21
100uF/16v 100uF/16v
10K 10K
MUX1-L
U29 U29
VGA_L
12 13 MUX1-L TV_AIN
X0 X
14
X1
15
X2
MUX1-R
11 3
X3 Y
MUX1-R
AMUX_5V VGA_R
1 16
Y0 VCC
C321 C321 C355 C355 SC2_R
5 8
Y1 GND
2 6
Y2 INH
4 7
Y3 VEE
0.1uF 0.1uF 10uF 10uF
SC2_R/L及TV_AIN网络更改
20080911
10
A
9
B
74HC4052 74HC4052
RA14 RA14
INT
10K 10K
P10 P10
COAXIAL
1
SPDIF
2
GND
JST1223 SPDIF OUT JST1223 SPDIF OUT
4
3
AUD_LOUT CA154 CA154 10uF/10v 10uF/10v RA110 RA110 20K 20K AUD_L
AUD_ROUT CA155 CA155 10uF/10v 10uF/10v RA111 RA111 20K 20K AUD_R
R409 R409
R406 R406 CA22 CA22
10K 10K
100uF/16V 100uF/16V
U30 U30
C420 C420 2.2uF 2.2uF
12 13
X0 X
C356 C356 2.2uF 2.2uF
14
X1
C382 C382 2.2uF 2.2uF 15
X2
SC2_L C418 C418 2.2uF 2.2uF
11 3
X3 Y
C419 C419 2.2uF 2.2uF
1 16
Y0 VCC
C384 C384 2.2uF 2.2uF
5 8
Y1 GND
C416 C416 2.2uF 2.2uF
2 6
Y2 INH
C417 C417 2.2uF 2.2uF
4 7
Y3 VEE
MUX_CTLC R333 100 R333 100
10
A
MUX_CTLD R408 100 R408 100
9
B
74HC4052 74HC4052
AMUX_5V AMUX_5V
RA7 RA7 RA8 RA8
10K 10K 10K 10K
MUX_CTLD MUX_CTLC
RA11 RA11 RA12 RA12
QA1 QA1 GPIO_20 QA2 QA2 AU_MUX
1 1
3904 3904 3904 3904
10K 10K 10K 10K
R51 R51
AOSDATA0 NS/10K NS/10K
R56 R56
AOLRCK NS/10K NS/10K
R57 R57
AOBCK NS/10K NS/10K
R58 R58
AOMCLK NS/10K NS/10K
SPDIFIN R59 R59 10K 10K
3
2
AMUX_5V
10K 10K
AUD_LOUT
AUD_ROUT
AMUX_5V
C322 C322 C358 C358
0.1uF 0.1uF 10uF 10uF
PWM3 INT GPIO_20 AU_MUX AUDIO OUTPUT
1 1 1 1
AV1 OUT
1 1
0 1 AV2 OUT
1
0 YPBPR1 OUT
1 1
1 YPBPR2 OUT
0 0 1
X 1 0 VGA OUT
X
X X 0 1 TV AUDIO OUT
0 0
X X SCART2 OUT
2
1
5V_M
5V_M
5V_M 2,3,6,8,13,14
D
GND
GND 2,3,4,5,6,7,8,9,10,11,13,14
AUD_L
AUD_L 3
AUD_R
AUD_R 3
INT
INT 3
PWM3
PWM3 3
Y2_R
Y2_R 9
Y2_L
Y2_L 9
Y1_R
Y1_R 9
Y1_L
Y1_L 9
AV1_L
AV1_L 8
AV1_R
AV1_R 8
AV2_L
AV2_L 8
AV2_R
AV2_R 8
VGA_L
VGA_L 8
VGA_R
VGA_R 8
SC2_R
SC2_R 10
SC2_L
SC2_L 10
C
SPDIFOUT
SPDIFOUT 3
GPIO_20
GPIO_20 3
AU_MUX
AU_MUX 3
TV_AIN
TV_AIN 11
B
AOSDATA0
AOSDATA0 3,6,13
AOBCK
AOBCK 3,13
AOLRCK
AOLRCK 3,13
AOMCLK
AOMCLK 3,13
SPDIFIN
SPDIFIN 3
A
MediaTek Confidential MediaTek Confidential MediaTek Confidential
MediaTek (ShenZhen) Inc. MediaTek (ShenZhen) Inc. MediaTek (ShenZhen) Inc.
Title Title Title
AudioMUX/SPDIF
Rev Rev Rev
Size Size Size Document Number Document Number Document Number
Drawn: Drawn: Drawn: 1 1 1
HISENSE_MT8222_EU
C C C Jiu.Ni
2008/1/25
Date: Date: Date: Sheet Sheet Sheet 12 12 12 of of of 14 14 14
1