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1-2 Pin Description of DVD Microcomputer : MN102LP62G (DVD AUDIO FRONT END, IC26)
Pin No.
Pin Name
1
WAIT
NRD(ODC/AVDEC
2
/SRAM)
3
NWEL
NWEH(ODC/AVDEC
4
/SRAM/ROM)
5
RAMCS(SRAM)
6
ODCCS
7
AVCS(AVDEC)
8
ROMCS(ROM)
9
SCLOCK(VDAC)
10
SDATA(VDAC)
11
FRD(ROM)
12
WORD
13~16
CPUADR(0~3)
17
VDD
18
SYSCLK(AVDEC)
19
VSS
20
XI
21
XO
22
VDD
23
OSCI(CLK135)
24
OSCO
25
MODE
26~33
CPUADR4~11
34
AVDD
35~42
CPUADR12~19
43
VSS
44
CPUADR20
45
CDH
46
HFMON
47
25BSY
48
KMODE
49
196BSY
50
FROMWR
51
TRVSW
52
AMUTE
53
FEPRST
54
VDD
55
FEPEN
56
NC
57
STBSACD
58
STBSP1
59
STBDAC1
60
STBPSL
61
VSS
62
MSREADY
63
E2CS
64
PROGSW
65
ICRST
66
VDD
CIRCUIT DESCRIPTION
I/O
Pin Description
I
Bus wait port.
O
Bus read port for ODC/AV Decoder/SRAM.
O
Bus read port for AV Decoder/RAM.
O
Bus read port for ODC/AV Decoder/SRAM/ROM.
O
SRAM chip select.
O
ODC chip select.
O
AV decoder chip select.
O
Flash ROM chip select.
I/O VDAC 12C clock.
I/O VDAC 12C data.
O
Flash ROM read port.
I
CSO bus width.
O
Bus address (0~3).
-
Supply voltage (+3.3V).
O
External clock output for AV decoder.
-
Connected to ground.
I
Unused.
O
Unused.
-
Supply voltage (+3.3V).
I
System clock input (13.5MHz).
O
Unused.
I
Processor mode selection.
O
Bus address (4~11).
-
Supply voltage (+3.3V).
O
Bus address (12~19).
-
Connected to ground.
O
Bus address (20).
O
Switching of DAC.
O
HF monitor output of ADSC.
O
Writing busy data output.
I
Selection of writing mode for the ROM.
I
Busy data input.
O
Enable control for writing jig.
I
Input port of traverse switch.
O
Audio mute control.
O
FEP reset output.
-
Supply voltage (+3.3V).
O
Enable output to FEP (traverse).
O
Unused.
O
Unused.
O
Strobe output to serial-parallel converter.
O
Strobe output to ADAC.
O
Strobe output.
-
Connected to GND.
I
SACD ready signal input.
O
Chip select to EEPROM.
I
Input port of program switch.
O
Reset signal output to periphery ICs.
-
Supply voltage (+3.3V).
DV-6050
Logic
H
L
Expension
Mode
Except
CD
CD
Normal
Busy
Writing
Normal
Normal
Busy
Off
On
Progressive
Interlace
7
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