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Pin No.
Pin Name
51
OFTR
52
BDO
53~56,61~64
PWM(1~8)
65
TBAL
66
FBAL
67
TRSDRV
68
SPDRV
69
FG
70
TILTP
71
TILT
72
TILTN
73
TX
74
DTRD
75
IDGT
79
OSCI1
80
OSCO1
82
TSTSG
83
VFOSHORT
84
JLINE
85,94,102,113
AVSS
86
ROUT
87
LOUT
88,99,109,116
AVDD
89
VCOF
90
TRCRS
91
CMPIN
92
LPFOUT
93
LPFIN
95
HRFOUT
96
HRFIN
97
CSLFLT
98
RFDIF
100
PLFLT2
101
PLFLT1
103
RV1
104
VREFH
105
PLPLG
106
VHALF
107
DSLF2
108
DSLF1
110
NARF
111
ARF
112
JITOUT
114
DAC0
115
DAC1
117
AD0
118
AD1
119
AD2
120
AD3
121
AD4
122
AD5/CAPAC2
123
AD6CAPAC1
124
TECAPA
127~130
MON(10~13)
131
NEJECT
CIRCUIT DESCRIPTION
I/O
I
Input of off track signal.
I
Input of drop out signal.
I/O
General PWM (1~8)output.
O
Tracking balance adjustment output.
O
Focus balance adjustment output.
O
Traverse drive output.
O
Spindle drive output.
I
Input of motor FG.
O
Tilt drive output (+).
O
Tilt drive reference output.
O
Tilt drive output (-).
O
Output signal of digital out (unused).
O
Switching signal of frequency control for data section (unused).
O
Switching signal of CAPA section (unused).
I
Input of crystal oscillator (16.9344MHz).
O
Output of crystal oscillator (unused).
O
EQ calibration signal.
O
Output pin of VFO short (unused).
O
Setting pin of J-LINE.
-
Ground for analog.
O
Audio output of MASH Rch (unused).
O
Audio output of MASH Lch (unused).
-
Power supply (+3.3V) for analog.
I
Control voltage for JFVCO.
I
Signal input for track cross formation.
I
WOBBLE comparator input (unused).
O
LPF output (unused).
I
LPF input.
O
HPF output (unused).
I
HPF input.
I
Capacitor for CPDET (unused).
I
RF input for CPDET.
I
Capacitor 2 for PLL.
I
Capacitor 1 for PLL.
I
Resistance for reference current source.
I
Reference voltage input (+2.2V).
I
Resistance for PLL phase gain setting (unused).
I
Reference voltage input (+1.65V).
I
Capacitor 2 for DSL.
I
Capacitor 1 for DSL.
I
Equivalent RF (-) input.
I
Equivalent RF (+) input.
O
Output pin for jitter monitor.
O
Output pin of tracking drive.
O
Output pin of focus drive.
I
FE input.
I
TEph/TE3b/Tepp input.
I
AS input.
I
RF envelope input.
I
Input of phase difference for tangential (unused).
I
Upper CAPA envelope input /hold capacitor
I
Lower CAPA envelope input /hold capacitor
I
Tracking error signal for CAPA.
O
Internal signal monitor (unused).
I/O
Detection pin of eject.
DV-6050
Pin Description
11
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