Pioneer SDV-P7 Service Manual page 102

SDV-P7
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Pin No. Pin Name
88 DACCK
89 LRCK
90 SRCK
91 VDD-91
92-94 ADOUT0-2
95 VSS-95
96 CLKMON
97 CLK121
98 VDD-98
99 CLK27
100 PLLAVDD
101 TCPOUT
102 PLLAVSS
103 CKIO
104 PLLVDD
105 LVDD-105
106 CLK81
107 VSS-107
108 APLLVDD
109 ATCPOUT
110 EXTCK
111 VDD-111
112 APLLAVDD
113 AVROUT
114 AVCOIN
115 APLLAVSS
TE
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116 VREFB
117 IREFB
118 COMPB
119 VBOUT
120 AVDD1
121 VREFG
122 IREFG
123 COMPG
124 VGOUT
125 AVSS1
126 VREFC
127 IREFC
128 COMPC
129 VCOUT
130 AVDD0
131 VREFY
132 IREFY
133 COMPY
134 VYOUT
135 AVSS0
136 N.C.
137 ACKIO
138 MODE121
139 PLLTEST
140,141 TESTSEL0,1
142 DCTEST
www 143 XVSYNCO
144 XHSYNCO
145 VCLK
146 LVDD-146
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147-150 VD0-3
151 VSS-151
152-155 VD4-7
102
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I/O Function and Operation
O DAC clock output
O LR clock output
O Bit clock output
Power supply
O Audio data output
GND
O Clock monitor
I 121.5MHz clock input
O Power supply
I 27MHz clock input
PLL analog power supply
O OPEN
O OPEN
I 81MHz clock select
PLL
Lch power supply
I 81MHz clock input
I GND
Analog PLL power supply
O OPEN
I Outside clock output
Power supply
Analog PLL audio power supply
OPEN
GND
Analog PLL audio GND
I DAC reference input
I DAC resistance terminal for bias current setting
I DAC capacity connection terminal for stabilization
O C analog output
Analog power supply
I DAC reference input
I DAC resistance terminal for bias current setting
I DAC capacity connection terminal for stabilization
O Cb composite analog output
Analog GND
I DAC reference input
I DAC resistance terminal for bias current setting
I DAC capacity connection terminal for stabilization
O Cr C analog output
Analog power supply
I DAC reference input
I DAC resistance terminal for bias current setting
I DAC capacity connection terminal for stabilization
O Y analog output
Analog GND
Not used
I Audio PLL test mode
I Clock mode select
PLL test
O Test signal
I DC test mode
I/O Vertical sync input/output
I/O Horizontal sync input/output
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O Video data clock
y
Lch power supply
i
O Video data bus
GND
O Video data bus
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