Aiwa CSD-TD31 Service Manual page 23

Pin No. Pin Name
43 XVDD
44 XOUT
45 XIN
46 XVSS
47 SBSY
48 EFLG
49 PW
50 SFSY
51 SBCK
52 FSX
53 WRQ
54 RWC
55 SQOUT
56 COIN
___________
57 CQCK
58 RES
59 T11
60 16M
61 4.2M
62 T5
______
63 CS
64 T1
I/O
— Crystal oscillator power supply pin.
O
Pin to which external 16.9344 MHz crystal oscillator is connected.
I
— Crystal oscillator GND pin. Be sure to connect to 0V.
O Subcode block sync signal output pin.
O C1, C2, single and dual correction monitoring pin.
O Subcode P, Q, R, S, T, U and W output pin.
O Subcode frame sync signal output pin. Falls down when subcode enters standby.
Subcode read clock input pin. Schmidt input. (Be sure to connected to 0V when not
I
in use.)
Pin outputting the 7.35 kHz sync signal which is generated by dividing frequency of
O
crystal oscillator.
O Subcode Q output standby output pin.
I Read/write control input pin. Schmidt input.
O Subcode Q output pin.
I Command input pin from microprocessor.
I Command input read clock or subcode read input clock from SQOUT pin
I LC78622 reset input pin. Set this pin to L once when the main power is turned on.
O Test signal output pin. Use this pin as open (normally L output).
O 16.9344 MHz output pin.
O 4.2336 MHz output pin.
I Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.
Chip select signal input pin with built-in pull-down resistor. Be sure to connect to 0V
I
while it is not controlling.
I Test signal input pin without built-in pull-down resistor. Be sure to connect to 0V.
31
Description