Table of Contents
Advertisement
LM-1510A(LM-1510B) Technical Service Manual
description (continued)
Configuring the GANGED input determines the power switching and over-current detection modes for the
downstream ports. External power management devices such as the TPS2044 are required to control the 5-V
source to the downstream ports according to the corresponding values of the PWRON pin. Upon detecting any
over-current conditions, the power management device sets the corresponding OVRCUR pin of the
TUSB2046B to a logic low. If GANGED is high, all PWRON outputs switch together and if any OVRCUR is
activated, all ports transition to power off state. If GANGED is low, the PWRON outputs and OVRCUR inputs
operate on a per port basis.
The TUSB2046B provides the flexibility of using a 6-MHz or a 48-MHz clock. The logic level of the TSTMODE
terminal controls the selection of the clock source. When TSTMODE is low, the output of the internal APLL
circuitry is selected to drive the internal core of the chip. When TSTMODE is high, the TSTPLL/48MCLK input
is selected as the input clock source and the APLL circuitry is powered down and bypassed. The internal
oscillator cell is also powered down while TSTMODE is high.
Low EMI emission is achieved because the TUSB2046B is able to utilize a 6 MHz crystal input. Connect the
crystal as shown in Figure 6. An internal PLL then generates the 48 MHz clock used to sample data from the
upstream port and to synchronize the 12 MHz used for the USB clock. If low power suspend and resume are
desired, a passive crystal or resonator must be used. However, a 6-MHz oscillator may be used by connecting
the output to the XTAL1 terminal and leaving the XTAL2 terminal open. The oscillator TTL output must not
exceed 3.6 V.
For 48-MHz operation, the clock can not be generated with a crystal, using the XTAL2 output, since the internal
oscillator cell only supports fundamental frequency.
Refer to Figure 7 and Figure 8 in the input clock configuration section for more detailed information regarding
input clock configuration.
The EXTMEM pin enables or disables the optional EEPROM interface. When the EXTMEM pin is high, the
product ID (PID) displayed during enumeration is the general-purpose USB hub. For this default, pin 5 is
disabled and pin 6 functions as the GANGED input pin. If custom PID and Vendor ID (VID) descriptors are
desired, the EXTMEM pin must be low (EXTMEM = 0). For this configuration, pin 5 and pin 6 function as the
EEPROM interface with pin 5 and pin 6 functioning as the EECLK and EEDATA, respectively. See Table 1 for
a description of the EEPROM memory map.
Other useful features of the TUSB2046B include a package with a 0.8 mm pin pitch for easy PCB routing and
assembly, push-pull outputs for the PWRON pins eliminate the need for pullup resistors required by traditional
open collector I/Os, and OVRCUR pins have noise filtering for increased immunity to voltage spikes.
--19--
Advertisement
Table of Contents
