5
QQ
3 7 63 1515 0
No.
Pin Name
50
TEST4
51
HFL
52
JT/XRR
53
DEFIN
54
DEFOUT
55
FG
56
CTRF
57
RESB
58
CSB
59
RDB
60
WRB
61
VDD
62
VSS
63
D0
64
D1
65
D2
66
D3
67
D4
68
D5
69
D6
70
D7
71
VSS
72
VDD
73
BUSYB
74
SQOUT
TE
L 13942296513
75
CQCKB
76
RWC
77
WRQ
78
VSS
79
VRPFR
80
VCOC
81
VPDO
82
VDD
83
PDO1
84
PDO2
85
PDO3
86
VSS
87
PCKIST1
88
PCKIST2
89
VDD
90
DVDFR
91
CDFR
92
JV
93
PCK
94
LCHP
95
LCHN
96
RCHP
97
RCHN
www
98
DVDD2
99
DVSS
100 LEFM
.
5
http://www.xiaoyu163.com
6
I/O
I
Test input pin
I/O
Mirror detection signal I/O
−
Not used
I
Defect signal control
O
LDD monitor output
I
FG counter input
I
Status input after binarization of EMF
I
Reset input
I
Chip select input
I
Read signal input
I
Write signal input
−
Power supply (+ 5.0 V)
−
Ground
I/O
Data bus 0
I/O
Data bus 1
I/O
Data bus 2
I/O
Data bus 3
I/O
Data bus 4
I/O
Data bus 5
I/O
Data bus 6
I/O
Data bus 7
−
Ground
−
Power supply (+ 3.3 V)
O
Busy signal output
−
Not used
I
Shift clock input of subcode Q data output
I
Update permission input of subcode Q
−
Not used
−
Ground
−
VCO oscillation range setting of PLL for system clock
I
PLL filter connection pin for system clock
O
PLL filter connection pin for system clock
−
Power supply (+ 5.0 V)
I/O
PLL filter connection pin 1 for EFM playback
I/O
PLL filter connection pin 2 for EFM playback
−
Not used
−
Ground
−
Current setting pin 1 of PLL charge pump for EFM playback
−
Current setting pin 2 of PLL charge pump for EFM playback
−
Power supply (+ 5.0 V)
−
VCO oscillation range setting pin 1 of PLL for EFM playback
−
VCO oscillation range setting pin 2 of PLL for EFM playback
O
Jitter output of PLL clock for EFM playback
−
Not used
I
Address input
I
Sync concordance pulse input of DVD
I
Sync signal input of DVD
−
Not used
−
Power supply (+ 3.3 V)
x
ao
u163
−
Ground
y
−
Not used
i
6
http://www.xiaoyu163.com
7
2 9
8
Pin Function
Q Q
3
6 7
1 3
1 5
co
.
DVD-V8000
7
9 4
2 8
0 5
8
2 9
9 4
2 8
m
8
9 9
A
B
C
9 9
D
E
F
157
8