Philips FW-V330/21M Service Manual page 37

ES3880 CIRCUIT
1601 D1 2210 E9 2258 E9 2271 E1
2201 E9 2223 A3 2268 D1 2272 F1
2206 E9 2235 B3 2270 B1 2273 C1
1
LEFT
22
21
RIGHT
AGND
A 20
19
DSA_ACK
18
DSA_STB From front uP to ES3880
17
DSA_DAT
16
15
14 CD10_RST
B 13
3270
& 100p 2270
12
100R
& 100p 2277
11
10
100R 3271
9 & 100p 2273
8
IIS_SCLK
7
&
C
6
IIS_WCLK
5
AUDIOCLK
4
AUDATA
IIS_DATA
BCLK
3
LR
2
+5V
1
1601
VCC7
D
7205-F
74HC04D
14
IIS_SCLK
13
12
7
&
7205-B
VCC7
74HC04D
14
IIS_DATA
3 4
E
7
VCC7
IIS_WCLK
1
7205-A
F
74HC04D
& PROVISION ON THE LAYOUT
@ True for audio with 44.1KHz sampling frequency only
Note : Some values may varies, see respective parts list for correct value.
1
8-7
2276 C2 2280 C9 3204 C3 3207 C4
2277 B2 2281 C9 3205 C8 3208 C3
2279 D1 2282 C9 3206 D4 3209 D3
2 3 4
To ES3883 LD(7:0)
5V
5212
VCC2
+5V
VCC1
+5V
5205
SILD
3276
SICL
100R RAB
3272
100R
SDA
VCC8
@
@
AIN
ARCLK
ARFS
VCC7
7205-E
74HC04D
14
3209
10
11
220R
7
7205-C VCC7
74HC04D
14
3210 220R
5 6
7
VCC7
14 14
3211 220R
2 9 8
7205-D
7 7
74HC04D
2 3 4
3210 E3 3214 B9 3234 E8 3272 B2 3275 B8
3211 F3 3217 B8 3270 B2 3273 B8 3276 B2
3213 B9 3228 A8 3271 B2 3274 B8 5205 B3
5 6
Data Bus (8X)
VCC2
1
VPP
7202
32
AT27C020
VCC
ES3883 select
LCS1#
LA(0:17)
7201
ES3880
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62
VCC1
81 VPP
PROCESSOR INTERFACE
LA(12) 82 LA12
83 LA13
LA(13)
RISC
84 LA14
LA(14)
PROCESSOR
LA(15) 85 LA15 HUFFMAN
LA(16) 86 LA16
DECODER
87 LA17
LA(17)
88 ACLK
89 AOUT|SEL-PLL0
64x32 ROM
90 ATCLK
SERIAL
91 ATFS|SEL-PLL1
32x32 SRAM
AUDIO
92 DA9|DOE_
INTERF
REGISTERS
93 AIN
94 ARCLK
95 ARFS
96 TDMCLK
97 TDMDR
TDM INTERFACE
98 TDMFS
DRAM INTERF
99 CAS_
100 VSS1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
VDD3
DA(0:8)
MSM514265E
VCC8
5 6
8-7
5207 E9 7201 B4 7205-A F2 7205-D F2
5212 A3 7202 A6 7205-B E1 7205-E D2
5213 D9 7203 F6 7205-C E2 7205-F D1
7 8
VCC3
VSS
16
EPROM
AUX5
VCC2
Chip enable
O/P enable
LD(0:7)
3274 220R
3275 220R
3273 220R
VDD3
61 60 59 58 57 56 55 54 53 52 51
VSS3 50
2Kx32 ROM
AUX4 49
DSA_S
AUX
AUX3 48
512x32 SRAM
AUX2 47
AUX1 46
DSA_D
MPEG DSA_A
AUX0 45
PROCESSOR
PCLK 44
135M10
PCLK2X 43
PCLKCSCN
CPUCLK 42
HSYNC 41
HSYNC
VSYNC 40
VIDEO OUTPUT
VSYNC
YUV7 39 YUV(7)
YUV6 38 YUV(6)
ON SCREEN
YUV5 37 YUV(5)
DISPLAY
YUV4 36
YUV(4)
YUV3 35 YUV(3)
DRAM DMA
YUV2 34 YUV(2) YUV(0:7)
CONTROLLER YUV1 33 YUV(1)
YUV0 32 YUV(0)
VDD2 31
VDD3
YUV(0:7)
23 24 25 26 27 28 29 30 6ms
85ms
5us
+5V
Video Reset
RSTOUT#
DBUS(0:15)
O/P enable
Column
7203
DRAM
write
Row
VCC8
Data bus (16X)
7 8
9
A
VCC1
DSA_STB
DSA_STB
B
DSA_ACK
DSA_DAT
C
To servo uP
D
VCC7
5213
5V
E
VCC8
5207
5V
F
3139 118 54470...for 88170...3448 pt2 dd wk0141
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