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This can, for instance, be a range from 15.625 to 90kHz with all tolerances included.
Whitout a horizontal sync signal the oscillator will be free-running at f mix . Any change of sync
conditions is detected by the unternal coinidence detector. A deviation of mpre than 4% between
horizontal sync and oscillator frequency will switch the horizontal section into search mode. This means
that PLL1 control currents are switched off immediately. The internal frequency detector then starts
tuning the oscillator. Very small DC currents at HPLL1(pin26) are used to perform this tuning with a
well defined change rate. When coincidence between horizontal sync and oscillator frequency is
defected, the search mode is first replaced by a soft-lock mode which lasts for the first part of the next
vertical period.
The soft-lock mode is than replaced by a normal PLL operation. This operation ensures a smooth tuning
and avoids fast changes of horizontal frequency during catching.
In this concept it is not allowed to load HPLL1.
The frequency dependent voltage at this pin is fed internally to HBUF(pin27)via a sample-and-hold and
buffer stage. The sample-and-hold stage removes all disturbanes caused by horizontal sync or
compostite vertical sync from the buffered voltage. An external resistor connected between pins HBUF
and HREF defines the frequency range.
Out-of-lock indication(pin HUNLOCK)
Pin hunlock is floating during search mode or if a protection condition is true.
All this can be detected by the microcontroller if a pull-up resistor is connected to its own supply
voltage.
For an additional fast vertical blanking at grid 1 of the picture tube, alv signal referenced to ground is
available at this output. Also the continuous protection blanking (see Section "Video clamping/vertical
blanking generator") is avallable at this pin. Via I2c-bus control, the control bit Blkdis Can switch off
horizontal unlock blanking while vertical blanking is maintained.
Horizontal oscillator
The horizontal oscillator is of the relaxation type and requires a capacitor of 10 nF at HCAP(pin29).
For optimum jitter performance the value of 10nF must not be changed.
The minimum oscillator frequency is determined by a resistor connected between pin HREF and
ground. A resistor connected between pins HREF and HBUF defines the frequency range.
The reference current at pin HREF also defines the integration time constant the vertical sync
integration.
--23--
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