National Semiconductor DS90C3202 Specifications page 6

3.3v 8 mhz to 135 mhz dual fpd-link receiver
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Two-Wire Serial Communication Interface
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
f
S2CLK Clock Frequency
SC
SC:LOW
Clock Low Period
SC:HIGH
Clock High Period
SCD:TR
S2CLK and S2DAT Rise Time
SCD:TF
S2CLK and S2DAT Fall Time
SU:STA
Start Condition Setup Time
HD:STA
Start Condition Hold Time
HD:STO
Stop Condition Hold Time
SC:SD
Clock Falling Edge to Data
SD:SC
Data to Clock Rising Edge
SCL:SD
S2CLK Low to S2DAT Data
Valid
BUF
Bus Free Time
AC Timing Diagrams
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Parameter
R
P
R
P
R
P
R
P
R
P
R
P
R
P
R
P
R
P
R
P
R
P
FIGURE 1. Two-Wire Serial Communication Interface Timing Diagram
Conditions
= 4.7KΩ, C
= 50pF
L
= 4.7KΩ, C
= 50pF
L
= 4.7KΩ, C
= 50pF
L
= 4.7KΩ, C
= 50pF
L
= 4.7KΩ, C
= 50pF
L
= 4.7KΩ, C
= 50pF
L
= 4.7KΩ, C
= 50pF
L
= 4.7KΩ, C
= 50pF
L
= 4.7KΩ, C
= 50pF
L
= 4.7KΩ, C
= 50pF
L
= 4.7KΩ, C
= 50pF
L
6
Min
Typ
Max
400
1.5
0.6
0.3
0.3
0.6
0.6
0.6
0
0.1
0.1
0.9
13
20147122
Units
kHz
us
us
us
us
us
us
us
us
us
us
us

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