Port C Status-Word Bit Definitions For Input (Ports A And B) - National Instruments 6508 PCI-DIO-96 User Manual

Chapter 6 Programming
Port C Status-Word Bit Definitions for Input
(Ports A and B)
Address:
Type:
Word Size:
Bit Map:
7 6
I/O I/O
Bit
7–6
5
4
3
2
1
0
PCI-DIO-96 User Manual
Base address + 03 (hex) for PPI A
Base address + 07 (hex) for PPI B
Base address + 0B (hex) for PPI C
Base address + 0F (hex) for PPI D
Read and write
8-bit
5 4
IBFA INTEA
Name
I/O
IBFA
INTEA
INTRA
INTEB
IBFB
INTRB
3
INTRA INTEB
Description
Input/Output—These bits can be used for
general-purpose I/O when port A is in mode 1 input.
If these bits are configured for output, the port C bit
set/reset function must be used to manipulate them.
Input Buffer Acknowledgment for Port A—A high
setting indicates that data has been loaded into the
input latch for port A.
Interrupt Enable Bit for Port A—Setting this bit
enables interrupts from port A of the 82C55A.
Control this bit by setting/resetting PC4.
Interrupt Request Status for Port A—When INTEA
and IBFA are high, this bit is high, indicating that an
interrupt request is pending for port A.
Interrupt Enable Bit for Port B—Setting this bit
enables interrupts from port B of the 82C55A.
Control this bit by setting/resetting PC2.
Input Buffer Acknowledgment for Port B—A high
setting indicates that data has been loaded into the
input latch for port B.
Interrupt Request Status for Port B—When INTEB
and IBFB are high, this bit is high, indicating that an
interrupt request is pending for port B.
6-12
2 1
IBFB
© National Instruments Corporation
0
INTRB