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1
BU2373FV (MAIN ASSY : IC205)
• VCO and Phase-Detector for PLL system
A
Pin Arrangement (topview)
1. LOGIC_V
DD
2. SELECT
3. VCO_OUT
4. FIN-A
B
5. FIN-B
6. PFD_OUT
7. LOGIC_GND
Pin Function
No.
Pin Name
1
LOGIC_V
DD
C
2
SELECT
3
VCO_OUT
4
FIN-A
5
FIN-B
6
PFD_OUT
7
LOGIC_GND
8
TEST
9
PFD_INHIBIT
10
VCO_INHIBIT
11
VCO_GND
D
12
VCO_IN
13
BIAS
14
VCO_V
DD
E
F
82
1
2
Block Diagram
VCO
14. VCO_V
DD
divide select
13. BIAS
VCO Output
12. VCO_IN
Frequency
Input 1
11. VCO_GND
Frequency
10. VCO_INHIBIT
Input 2
9. PFD_INHIBIT
Phase Detect
Output
8. TEST
Digital power supply
VCO output frequency select (H : 1/2 output, L : 1/1 output)
VCO output
Input reference frequency is applied to FIN-A
Input for VCO external counter output frequency
PD output
Digital ground
Test input with pull-down resistor (normaly open or L)
Control pin for PD (H : PD disable (Hi impedance state), L : PD enable)
VCO mode select (H : VCOOUT disable (L fix), L : VCOOUT enable)
Ground for VCO (analog ground)
VCO control voltage input
For adjusting VCO output frequency range (An external resistor connect between VCO_VDD and BIAS)
Power supply for VCO (Analog power supply)
DVD-R7783
2
3
Logic
V
DD
Through
Level
or 1/2
Shifter
Phase
Pmos Gate
Detector
Nmos Gate
Logic
GND
Pin Function
3
4
VCO
V
DD
Bias resistor Terminal
(Connect a resistor
between vco V
)
DD
VCO
VCO frequency Control input
(Force DC Voltage)
VCO
GND
VCO Powerdown and Output
disable
(H : disable L : enable)
Phase Detector Output-Enable
(H : disable L : enable)
Test Pin
(Normally L or Open)
4
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