Daewoo DV-115 Service Manual page 11

7. Internal Block Diagram of ICs
Model : DV-115
HY57V161610DTC-8
Self Refresh Counter
Refresh Refresh
Interval Timer Counter
512Kx16
Bank 0
Address[0:10]
Sense AMP & I/O gates
Column Decoder
CLK
Address
Precharge
CKE
Register
Row Active
BA(A11)
Column Addr.
Column Active
CS
Latch & Counter
RAS
Overflow
Burst Length
Counter
CAS
W E
U D Q M
Column Decoder
L D Q M
Sense AMP & I/O gates
512Kx16
Bank 1
Mode Register Test Mode
M62446FP
SYSTEM BLOCK DIAGRAM
C in volume
SW in
SL in
SR in
BYPASS1
BYPASS2
L in
tone
volume
R in
-com
interface
LATCH DATA CLK
MITSUBISHI
VDD 1 50
DQ0 2 49
DQ1 3 48
VSSQ 4 47
DQ2 5 46
DQ3 6 45
VDDQ 7 44
DQ4 8 43
DQ5 9 42
VSSQ 10 41
DQ6 11 40
DQ7 12 39
50pin TSOP-II
D Q 0 VDDQ 13 38
400mil x 825mil
D Q 1
LDQM 14 37
0.8mm pin pitch
D Q 2
WE 15 36
D Q 3
D Q 4
CAS 16 35
D Q 5
RAS 17 34
D Q 6
CS 18 33
D Q 7
D Q 8
A11 19 32
D Q 9
A10 20 31
DQ10
DQ11
A0 21 30
DQ12
A1 22 29
DQ13
A2 23 28
DQ14
DQ15
A3 24 27
VDD 25 26
I/O Control
OUT4 1
OUT-
OUT3 2
MCU
PUT
PORT
OUT2 3
volume
I/F
OUT1 4
AVDD
5
volume
SWin
6
GNDS
7
SRin
8
volume
Cout SLin
9
SWout
GNDC 10
SLout
volume
Cin 11
SRout
GNDR
12
Rin
13
volume
Lout GNDL
14
Rout
Lin
15
BYPASSR
16 volume
BYPASSL
17
LTRE
18
LBASS3
19
tone
LBASS2 20 tone
LBASS1
21
11
7. Internal Block Diagram of ICs
Model : DV-115
LA7952
VSS
DQ15
DQ14
VSSQ
DQ13
DQ12
VDDQ
DQ11
DQ10
VSSQ
DQ9
DQ8
VDDQ
NC
NJM2068
UDQM
CLK
CKE
NC
A9
A8
A7
A6
A5
A4
VSS
NJU7313A
42 DVDD
41 CLK
40 DATA
39 LATCH
DGND
38
AGND
37
SW out
36
SRout
35
SLout
34
33 Cout
32 Rout
Lout
31
AVSS
30
CL1
29
CL2
28
CR1
27
CR2
26
RTRE
25
RBASS3
24
RBASS2
23
22 RBASS1
11