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D. Motor Control Circuit
Figure 2-10 is a motor drive circuit diagram.
Control program analizes a command sent from the host computer, and sends a motor
clock generation command to ASIC. Gate array generates eight-phase motor drive pulse
signals [I01, I02, I11, I12, I21, I22, I31, I32]. These signals are sent to the drive motor via
motor driver.
When the host computer changes the resolution, the control program commands ASIC to
change the drive motor rotating speed by changing the frequency of the motor drive pulse
signal .
COPYRIGHT 2003 CANON INC. CANOSCAN 9900F REV.0 FEB. 2003 PRINTED IN JAPAN (IMPRIME AU JAPON)
Host
Computer
Control
Program
Main PCB
I01
I02
ASIC
I11
I12
I21
I22
I31
I32
Figure 2-10
Motor
OUT1B
JP8-1
Driver
OUT1A
-2
OUT2A
-3
OUT2B
-4
CHAPTER 2
Drive Motor
2 - 11
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