Schematic Diagram - Main Board (7/9) - Sony HCD-DZ150K Service Manual

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6-12. SCHEMATIC DIAGRAM – MAIN BOARD (7/9) –
3 7 6 3 1 5 1 5 0
MAIN BOARD
(7/9)
T E
L 1 3 9 4 2 2 9 6 5 1 3
MAIN BOARD
39
(4/9) (Page 36) 3.3V
L3051
10uH
MAIN BOARD
38
(4/9) (Page 36) A12V
L3052
(5/9) (Page 37) 10uH
(8/9) (Page 40) C3091
220
16V
CN3002
4P
TP3053 C3051
4 0 . 1
+31.5V
F
+31.5V 3
POWER
P-GND 2
BOARD
P-GND 1
CN904
R3051
TP3054
(Page 41) 100k
w w w
HCD-DZ150K/DZ151KB
• See page 52 for Waveform. • See page 53 for IC Block Diagram.
MAIN
BOARD 7
(5/9)
(Page 37)
SOFTMUTE
PGMUTE
SC_DT
SCSHIFT
SOLATCH1
OVF
TP3024
R3012
470
TP3026
R3013
INIT 10k
R3014
TP3029
22
R3015 TP3030
100
TP3002
C3016
0 . 1
C3017
0 . 1
R3017 TP3036
680
IC3050
+1.8V REG
5 4
IC3050 C3054
100
TK11118CSCL-G 16V
C3055
0 . 0 1
1 2 3
C3053
0.001
C3052
1
x a o
y
. i
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MAIN BOARD
6
(6/9)
(Page 38)
R3055
C3015
C3014
R3011 470 0 . 1 0 . 1 100
24 23 22 21 20 19 18 17 16 15 14 13
R3041
0
3 . 3
25 12
OVF FLAGL VSSL
1 . 7 R3151 100
26 11
SFLAG OUTL1(+)
3 . 3 3 . 3
27 10 C3013
INIT VDDL
0 . 1
1 . 7
9
28 MCKSEL OUTL2(-)
IC3010
1 . 7 R3152
CXD9843AR
29 8 100
LRCK VSSL
1 . 7
30 7
BCK VSSR R3101
IC3010 100
0 1 . 7
31 6
DATA (DATA1) OUTR1(+)
3 . 3 3 . 3
S-MASTER PROCESSOR C3012
32 5
BFVDD VDDR
0 . 1
1 . 7
33 BFVSS OUTR2(-) 4
R3102
34 3 100
TEST VSSR
1 . 8
35 2
DVDD VSUBC
5
1 . 7
36 1
XFSIIN XVSS
C3011
47
16V
37 38 39 40 41 42 43 44 45 46 47 48
Q Q
3 7 6
TP3048
TP3015
C3018 C3019
C3020
0 . 1
0 . 1 0 . 1
R3054
22
R3040
0
IC3051 JL3008
C3060
OSC
C3059
10p
0.001
L3053
FB3051
10uH
0
JL3009
5 4
R3053
L3054
100
1uH
C3057 R3052
C3056 0 . 0 1 1M
220
10V
X3051
49.152MHz
1 2 3
C3058
5p
JL3064
u 1 6 3
39 39
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2 4
8 9 9
IC3150
C3156 S-MASTER
0 . 0 3 3
DIGITAL AMP
JL3087
IC3150
CXD9883M
1 6 . 5
0 3 1 . 3
JL3033
R3153 BST_A PVDD_A
0 12 3 1 . 3
JL3034
GVDD_A PVDD_A
C3153 0
3 1 . 3
TP3150
0 . 1
/DTW PVDD_A C3162 0
100
3 . 3 (OpenDrain)
35V
/SD GND C3163
0 . 1
R3154 3 . 3 (OpenDrain)
0
/RESET GND
1 6 . 5
1 . 7
PWM_A GND
1 1 6 . 5 JL3059
L3152
OC_ADJ OUT_A C3165
10uH
R3157
1 6 . 5 1
15k
GND OUT_A
D4152
1 6 . 5
RSA39LATE25
GND OUT_A
JL3035
3 . 3 1 6 . 5
C3154
VREG OUT_B D4151
0 . 1
1 6 . 5 RSA39LATE25
JL3112
M3 OUT_B
L3151 C3164
1 6 . 5
JL3113 10uH
1
M2 OUT_B
JL3114
M1 GND
0
PWM_B GND
R3165
0 12
JL3036
C3158
VDD GND
0 . 1
C3159
3 1 . 3
100
C3150
35V
0 . 1 GND PVDD_B
12 3 1 . 3
JL3037
GVDD_B PVDD_B
R3166
27 3 1 . 3
JL3038
0
BST_B PVDD_B
JL3057
C3155
0 . 1
C3166
1 6 . 5
2200
35V
C3157 0 . 0 3 3
C3106
0
0 . 0 3 3
IC3100
3 1 0 5 1 5 3 1 . 3 0 8 9 2
S-MASTER
JL3039 BST_A PVDD_A 0
R3103
0 12 3 1 . 3 DIGITAL AMP
JL3040
GVDD_A PVDD_A
3 1 . 3
C3103
TP3110 C3112
0 . 1
/DTW PVDD_A 1 6 . 5
100
(OpenDrain)
3 . 3 35V
C3113
/SD GND
0 . 1
R3104 (OpenDrain)
3 . 3
0
/RESET GND JL3058
1 . 7
PWM_A GND
1 1 6 . 5
R3107 L3112
OC_ADJ OUT_A
15k 10uH
1 6 . 5
GND OUT_A
D4112
1 6 . 5 C3115
RSA39LATE25 1
GND OUT_A
JL3041
3 . 3 1 6 . 5
C3104 C3114
VREG OUT_B D4111
0 . 1
1
1 6 . 5 RSA39LATE25
JL3115
M3 OUT_B
1 6 . 5 L3111
JL3116
10uH
M2 OUT_B
JL3117
M1 GND
0
PWM_B GND
12
R3115 JL3042 C3108
0 VDD GND
0 . 1 C3109
3 1 . 3 100
C3100
0 . 1 GND PVDD_B 35V
12 3 1 . 3
JL3043
R3116
GVDD_B PVDD_B
0
27 3 1 . 3
JL3044
C3105 BST_B PVDD_B
0 . 1
IC3100
CXD9883M
C3116
2200
35V
C3107 0 . 0 3 3
E
EB3002
(CHASSIS)
m
c o
.
HCD-DZ150K/DZ151KB
2
8 9 9
18 19 20
Q3152
2SA1235TP-1EF
DC DETECT
1 6 . 5
C3125 R3177
2 . 2 100k
1 6 . 5
Q3151
2SA1235TP-1EF
DC DETECT
R3175
R3176
100k
100k
C3173
0.001
C3172
0.001 CN3100
4P
TP3104
Q3102 4
FL + / FR DDTD +
2SA1235TP-1EF
TP3103
3
DC DETECT
FL - / FR DDTD -
1 6 . 5 H
TP3102 2
FR - / FR DDTD -
SPEAKER
TP3101
1 FR + / FR DDTD +
BOARD
CN303
C3124 C3122
R3127 (Page 48)
0.001
2 . 2 100k 4 9 8 2 9 9
C3123
0.001
1 6 . 5
Q3101
2SA1235TP-1EF
DC DETECT
EB3003
E
R3126 R3125 (CHASSIS)
100k
100k
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