Aiwa XR-M171 Service Manual page 28

Pin No. Pin Name
39 CV–
40 CV+
41 RFSM
42 RFS–
43 SLC
44 SLI
45 D-GND
46 FSC
47 TBC
48 NC
49 DEF
50 CLK
51 CL
52 DAT
53 CE
54 DRF
55 FSS
56 VCC2
57 REFI
58 VR
59 LF2
60 PHI
61 BHI
62 LDD
63 LDS
64 VCC1
I/O
I Input for CLV error signal from DSP.
O Output for RF.
O For setting RF gain and 3T compensation constant together with RFSM.
SLICE LEVEL CONTROL; output for controlling the data slice level of DSP with
O
RF waveform.
I Input for controlling the data slice level of DSP.
– GND for digital system.
O Output pin for focus search smoothing capacitor.
I (Tracking Balance Control) EF balance variable range setting pin.
– Not connected.
O Output for disk defect detection.
I Standard clock input; DSP's 4.23MHz is inputted.
I Clock input for microcontroller command.
I Data input for microcontroller command.
I Chip-enable input for microcontroller command.
O Detect RF; output for RF level detection.
(Focus Search Mode) = search/+search against reference voltage switching pin.
I
(Not used)
– VCC pin for servo and digital systems.
I For connecting pass capacitor to reference voltage.
O Reference voltage output.
– For setting disk defect-detection time constant.
– Connects to capacitor for RF signal peak hold.
– Connects to capacitor for RF signal bottom hold.
O Output for APC circuit.
I Input for APC circuit.
– VCC pin for RF system.
Description
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