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HCD-ZX10D
QQ
3 7 63 1515 0
Pin No.
Pin Name
193, 194
HCS2, HCS1
195
HCS0
196
VDDP
197
TRST
198
TDO
199
TDI
200
TMS
201
TCK
202
RESET
203
BUS CLK
204
GND
205
VDD
206
HA3
207
HA2
208
GNDP
TE
L 13942296513
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82
http://www.xiaoyu163.com
I/O
O
Chip select signal output terminal
O
Chip select signal output to the program ROM
–
Power supply terminal (+3.3V)
I
Reset signal input terminal (for JTAG)
O
Data output terminal (for JTAG)
I
Data input terminal (for JTAG)
I
Mode selection signal input terminal (for JTAG)
I
Clock signal input terminal (for JTAG)
I
System reset signal input from the master controller
O
Not used
–
Ground terminal
–
Power supply terminal (+1.8V)
O
Address signal output to the program ROM
O
Address signal output to the program ROM and address latch
–
Ground terminal
x
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http://www.xiaoyu163.com
2 9
8
Description
Not used
Not used
Q Q
3
6 7
1 3
1 5
co
.
9 4
2 8
"L": reset
0 5
8
2 9
9 4
2 8
m
9 9
9 9
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