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Aplex ASB-L801 User Manual

Industrial embedded motherboard epic, sbc intel socket p, gm45/ ich9m
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ASB-L801
Industrial Embedded Motherboard
EPIC, SBC Intel Socket P, GM45/ ICH9M
User's Manual
Version：1.00
Preliminary
This publication, including all photographs, illustrations and software, is protected under international
copyright laws, with all rights reserved. Neither this manual, nor any of the material contained herein,
may be reproduced without written consent of the author.
All rights are reserved by Aplex Technology Inc.
The information in this document is subject to change
without notice. Please refer to your vendor for the latest information.

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Summary of Contents for Aplex ASB-L801

  • Page 1 Neither this manual, nor any of the material contained herein, may be reproduced without written consent of the author. All rights are reserved by Aplex Technology Inc. The information in this document is subject to change...

  • Page 2: Table Of Contents

    Contents CONTENTS ............................2 1 PACKING LIST ..........................4 2 DISCLAIMER ..........................4 3 TRADEMARKS ..........................4 4 SAFETY NOTICES ........................4 5 INTRODUCTION ..........................5 5.1 SPECIFICATIONS ......................... 5 5.2 BOARD DIMENSIONS ......................7 5.3 JUMPERS AND CONNECTORS LOCATION ............... 7 5.4 JUMPERS SETTING AND CONNECTORS ................
  • Page 3 22. DC_IN2 ........................14 23. SATA1,SATA2 ......................15 24. SATA_P1 ........................15 25. JP_104 ........................15 26. PC104+ ........................15 27. H1,H2,H3,H4 ....................... 15 28. H7,H8,H9,H10 ......................15 29. H11,H12,H13 ....................... 15 30. LED1,LED3 ......................... 15 31. MPCIE1 ........................15 32.

  • Page 4: Packing List

    The information in this document is subject to change without further notice. Please refer to your vendor for the latest information. In no event shall Aplex Technology Inc. be liable for hidden defects or damages of any kind, whether consequential or incidental, arising from improper use or installation of the product.

  • Page 5: Introduction

    5 Introduction ASB-L801 is a 4" industrial Embedded motherboard developed on the basis of Intel GM45+ ICH9M, which provides abundant peripheral interfaces to meet the needs of different customers. Also, it features dual 1000M LAN port, 5-COM port and dual Mini PCIE configuration. To satisfy the special needs of high-end customers, PC104+ port (capable of adjusting IO voltage) richer extension functions.
  • Page 6 Power DC12V input Management 1 x 2-pin power input connector by 2x5-pin header Front I/O Power on/off switch Reset switch Power LED status HDD LED status Buzzer Software programmable 1 – 255 second by Super I/O Watchdog Timer 1 x COM Port (COM1) 4 x USB 2.0 Ports (stack) 2 x RJ45 GbE Port (10/100/1000Mbps) External I/O port...

  • Page 7: Board Dimensions

    5.2 Board Dimensions 5.3 Jumpers and Connectors Location Board Top...

  • Page 8: Jumpers Setting And Connectors

    Board Bottom 5.4 Jumpers Setting and Connectors 1. RTC/SRTC: (2.0mm Pitch 1X2 Pin Header)CMOS clear jumper, CMOS clear operation will permanently reset old BIOS settings to factory defaults. RTC/SRTC CMOS OPEN NORMAL (default) CLOSE 1-2 Clear CMOS Procedures of CMOS clear: 5.4.1.1 Turn off the system and unplug the power cord from the power outlet.

  • Page 9: Bat1

    3. BAT1: (1.25mm Pitch 1X2 box Pin Header) 3.0V Li battery is embedded to provide power for CMOS. Pin# Signal Name Pin1 VBAT PIN2 Ground 4. F_PANEL: (2.0mm Pitch 2X5 Pin Header), Front panel connector. Signal Name Pin# Pin# Signal Name HD LED+ POWER LED+ Ground...

  • Page 10: Com2,Com4

    Signal Name Pin# Pin# Signal Name Ground Jp1 Setting: Pin1-2 : 5V (default) Pin2-3:12V (option) 7. COM2/COM4 : (2.0mm Pitch 2X5 Pin Header),COM2 COM4 Port, up to 2 standard RS232 ports are provided. They can be used directly via COM cable connection. Signal Name Pin# Pin#...

  • Page 11: Usb3,Usb4

    Pin# Signal Name DCD# (Data Carrier Detect) RXD (Received Data) TXD (Transmit Data) DTR (Data Terminal Ready) Ground DSR (Data Set Ready) RTS (Request To Send) CTS (Clear To Send) JP1 Setting: Pin1-2 : RI (Ring Indicator) (default) Pin3-4 : 5V Standby power (option) Pin5-6:12V Standby power (option)

  • Page 12: Gpio1

    codec is used to provide high-quality audio I/O ports. Line Out can be connected to a headphone or amplifier. Line In is used for the connection of external audio source via a Line in cable. MIC is the port for microphone input audio. Signal Name Pin# Pin#...

  • Page 13: Crt1

    18. CRT1: (CRT Connector DB15),Video Graphic Array Port, provide high-quality video output. they can not work at the same time for CRT and VGA1. 19. VGA1: (CRT 2.0mm Pitch 2X5 Pin Header), Video Graphic Array Port, Provide 2x5Pin cable to VGA Port, they can not work at the same time for CRT and VGA1. Signal Name Pin# Pin#...

  • Page 14: Dc_In2

    LB_D1_N LA_D1_N LA_D1_P LA_D1_P Ground Ground LB_D2_N LA_D2_N LB_D2_P LA_D2_P Ground Ground LB_CLK_N LA_CLK_N LB_CLK_P LA_CLK_P Ground Ground LVDS_DDC_DATA LVDS_DOC_CLK Ground Ground LB_D3_N LA_D3_N LB_D3_P LA_D3_P 22. DC_IN2: (5.0mm 1x2 Pin Connector),DC12V System power input connector。 Pin# Signal Name +12V Ground DC_IN1: (2x2 box Pin Connector),DC12V System power input connector。...

  • Page 15: Sata1,Sata2

    SATA1/2: (SATA 7P),SATA1,SATA2 SATA Connectors, Two SATA connectors are provided, with transfer speed up to 3.0Gb/s. 24. SATA_P1: (2.5mm Pitch 1x2 box Pin Header),an onboard 5V output connector is reserved to provide power for IDE/SATA devices. Pin# Signal Name +DC5V Ground Note: Output current of the connector must not be above 1A.

  • Page 16: Ddr3

    card can be set as 3.3V or 5V. The default setting of the product is 3.3V. 34. DDR3: (SO-DIMM 204Pin socket), DDRIII memory socket, the socket is located at the bottom of the board and supports 204Pin 1.5V DDRIII 800/1066MHz FSB SO-DIMM memory module up to 2G.

  • Page 17: Bios Setup Utility

    After optimizing and exiting CMOS Setup, the POST screen displayed for the first time is as follows and includes basic information on BIOS, CPU, memory, and storage devices. AMIBIOS© 2009 American Mega trends , Inc. BIOS Date: 03/08/11 23:27:33 Ver: 08.00.15 CPU : Genuine Intel(R) CPU @ 2.00GHz Speed : 2.00 GHz...

  • Page 18: Main System Overview

    BIOS SETUP UTILITY Main Advanced PCIPnP Boot Security Chipset Exit System Overview User [ENTER]，[TAB] or [SHIFT-TAB] to AMIBIOS Select a field Version : 08.00.15 Build Date : 03/08/11 Use[+] or [-] to : L801V010 configure system Time. Processor Genuine Intel(R) CPU @ 2.00GHz Speed :2000MHz...

  • Page 19: Advanced Settings

    System Time: Set the system time, the time format is: Hour : 0 to 23 Minute : 0 to 59 Second : 0 to 59 System Date: Set the system date, the date format is: Note that the „Day‟ automatically changes when you set the date. Day: Month: 01 to 12 Date:...
  • Page 20 6.4.1 CPU Configuration BIOS SETUP UTILITY Advanced Configure advanced CPU settings For UP platforms, Module Version: 3F.10 Leave it enabled. For DP/MP serves, Manufacturer : Intel It may use to tune Genuine Intel(R) CPU 575 @ 2.00GHz Performance to the Frequency :2.00GHz Specific application.
  • Page 21 6.4.2 IDE Configuration BIOS SETUP UTILITY Advanced IDE Configuration Disabled Compatible SATA#1 Configuration [Compatible] Enhanced Configure SATA as [IDE] SATA#1 Configuration [Enhanced] ► Primary IDE Master : [Not Detected] ► Primary IDE Slaver : [Not Detected] ► Secondary IDE Master : [Not Detected] ►...
  • Page 22 ATA(PI) 80Pin Cable Detection: [Host & Device] [Host] [Device] 6.4.3 Super IO Configuration BIOS SETUP UTILITY Advanced Configure Win627UHG Super IO Chipset Allow BIOS to Select Serial Port Base Serial Port1 Address [3F8] Address. Serial Port2 Address [2F8] Serial Port3 Address [3E8] Serial Port3 IRQ [IRQ4]...
  • Page 23 BIOS SETUP UTILITY Advanced Hardware Health Configuration System Temperature :36℃/96℉ 55℃/131℉ 60℃/140℉ CPU Temperature :45℃/113℉ 65℃/149℉ CPUFAN Speed :5018 RPM 70℃/158℉ Vcore :1.064V AVCC :5.091 V 5VCC :5.100 V 3.3V :3.328 V 5.0V :5.01 V :12.01 V :5.10 V ← Select Screen VBAT :3.400 V ↑↓...
  • Page 24 [Advanced ACPI Configuration] ACPI Version Features: [ACPI V1.0] [ACPI V2.0] [ACPI V3.0] ACPI APIC support: [Enabled] [Disabled] AMI OEMB table: [Enabled] [Disabled] Headless mode: [Disabled] [Enabled] [Chipset ACPI Configuration]: APIC ACPI SCI IRQ: [Disabled] [Enabled] High Performance Event Timer: [Disabled] [Enabled] 6.4.6 AHCI Configuration BIOS SETUP UTILITY...
  • Page 25 While entering setup, BIOS auto detects the presence of IDE devices. This displays the status of auto detecting of IDE devices 6.4.7 MPS Configuration BIOS SETUP UTILITY Advanced MPS Configuration Select MPS MPS Revision [1.1] Revision ← Select Screen ↑↓ Select Item +- Charge Field F1 General Help F10 Save and Exit...
  • Page 26 Active State Power Management: [Disabled] [Enabled] 6.4.9 Smbios Configuration BIOS SETUP UTILITY Advanced Smbios Configuration SMBIOS SMI Wrapper Support for PnP Func Smbios Smi Support [Enabled] 50h-54h ← Select Screen ↑↓ Select Item Charge Field General Help F10 Save and Exit ESC Exit V02.61 ©...

  • Page 27: Advanced Pci/Pnp Settings

    V02.61 © Copyright 1985-2006 American Mega trends , Inc. Legacy USB Support: [Enabled] [Disabled] USB2.0 Controller Mode: [FullSpeed] [HiSpeed] BIOS EHCI Hand-Off: [Enabled] [Disabled] 6.5 Advanced PCI/PnP Settings This part describes configurations to be made on PCI bus system. PCI, namely Personal Computer Interconnect, is a computer bus that allows I/O device to operate nearly as fast as CPU in its own way.
  • Page 28 Clear NVRAM: [No] [Yes] Plug & Play OS: [No] [Yes] PCI Latency Timer: [64] [32] [96] [128] [160] [192] [224] [248] Allocate IRQ to PCI VGA: [Yes] [No] Palette Snooping: [Disabled] [Enabled] PCI IDE BusMaster: [Disabled] [Enabled] OffBoard PCI/ISA IDE Card: Some PCI IDE cards may require this to be set to the PCI slot number that is holding the card.

  • Page 29: Boot Settings

    DMA Channel 0/1/3/5/6/7: [Available] [Reserved] Available: Specified DMA is available to be used by PCI/PnP devices. Reserved: Specified DMA is reserved for use by legacy ISA devices. Reserved Memory Size: Size of memory block to reserve for legacy ISA devices. [Disabled] [16k] [32k]...
  • Page 30 [Disabled] [Enabled] Disabled: Displays normal POST messages. Enabled: Displays OEM logo instead of POST messages. AddOn ROM Display Mode: Set display mode for Option ROM. [Force BIOS] [Keep Current] Bootup Num－Lock: Select Power-on state for Numlock. [On] [Off] PS/2 Mouse Support:(R1.0) Select support for PS/2 Mouse.

  • Page 31: Security Settings

    6.7 Security Settings BIOS SETUP UTILITY Main Advanced PCIPnP Boot Security Chipset Exit Security Settings Install or Change the password. Supervisor Password :Not Installed User Password :Not Installed Change Supervisor Password Change User Password Boot Sector Virus Protection [Disabled] ← Select Screen ↑↓...

  • Page 32: Advanced Chipset Settings

    up. A confirmation message will be shown on the screen as to whether the password will be disabled. You will have direct access to BIOS setup without typing any password after system reboot once the password is disabled. Once the password feature is used, you will be requested to type the password each time you enter BIOS setup.
  • Page 33 BIOS SETUP UTILITY Chipset North Bridge Chipset Configuration ENABLE: Allow Remapping of Memory Remap Feature [Enabled] Over lapped PCI Memory PCI MMIO Allocation: 4Gb To 3072MB Above the total Memory Hole [Disabled] Physical memory Initate Graphic Adapter [PCI/IGD] DISABLE: Do not allow IGD Graphics Mode Select [Enabled ,64MB] remapping of memory...
  • Page 34 Video Function Configuration: BIOS SETUP UTILITY Chipset Video Function Configuration Options Fixed Mode DVMT Mode Select [DVMT Mode] DVMT Mode DVMT/FIXED Memory [256MB] Boot Display Device [VBIOS-Default] Flat Panel Type [1024x768 18bit 1c] Backlight Control Support [VBIOS-Default] Backlight Control Level [Level 5] Backlight Control Mode [DC]...
  • Page 35 [1440x900 24bit 2ch] [1600x900 24bit 2ch] [1680x1050 24bit 2ch] [1920x1080 24bit 2ch] Backlight Control Support [VBIOS-Default] [Both BLC & BIA Disabled] [BLC Enabled] Backlight Control Control: [Level5] [Level0] [Level1] [Level2] [Level3] [Level4] [Level6] [Level7] Note: Panel support PWM Function. Backlight Control Mode: [DC] [PWM] Backlight Image Adaptation:...
  • Page 36 6.8.2 South Bridge Configuration: BIOS SETUP UTILITY Chipset South Bridge Chipset Configuration Options Disabled USB Functions [8 USB Ports] 2 USB Ports USB2.0 Controller [Enabled] 4 USB Ports Keep USB Power at S5 [Enabled] 6 USB Ports Wireless Controller [Enabled] 8 USB Ports HAD Controller [Enabled]...
  • Page 37 SMBUS Controller: [Enabled] [Disabled] SLP_S4# Min. Assertion Width: [1 to 2 Seconds] [4 to 5 Seconds] [3 to 4 Seconds] [2 to 3 Seconds] Restore on AC Power Loss: [Power Off] [Power On] [Last Status] PCIE Ports Configuration: PCIE Port 0: [Auto] [Enabled] [Disabled]...

  • Page 38: Exit Options

    [Enabled] PCIE Port 1 IOxAPIC Enabled: [Disabled] [Enabled] PCIE Port 2 IOxAPIC Enabled: [Disabled] [Enabled] PCIE Port3 IOxAPIC Enabled: [Disabled] [Enabled] PCIE Port4 IOxAPIC Enabled: [Disabled] [Enabled] PCIE Port5 IOxAPIC Enabled: [Disabled] [Enabled] Exit Options BIOS SETUP UTILITY Main Advanced PCIPnP Boot Security...
  • Page 39 Save Changes and Exit: Save configuration changes and exit setup? F10 key can be used for this operation) [OK] [Cancel] Discard Changes and Exit: Discard Changes and Exit setup? ESC key can be used for this operation) [OK] [Cancel] Discard Changes: Discard changes? F7 key can be used for this operation) [OK]...

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