command is executes on chip or sector(4K-bytes) or block(64K-bytes). To provide user
with ease of interface, a status register is included to indicate the status of the chip. The
status read command can be issued to detect completion status of a program or erase
operation via WIP bit. When the device is not in operation and CS# is high, it is put in
standby mode and draws less than 10uA DC current. The MX25L1005 utilize MXIC's
proprietary memory cell, which reliably stores memory contents even after 100,000
program and erase cycles.
10.2. Features
Serial Peripheral Interface (SPI) compatible -- Mode 0 and Mode 3
1,048,576 x 1 bit structure
32 Equal Sectors with 4K byte each, Any Sector can be erased individually
2 Equal Blocks with 64K byte each, Any Block can be erased individually
Single Power Supply Operation
2.7 to 3.6 volt for read, erase, and program operations
Latch-up protected to 100mA from -1V to Vcc +1V
Low Vcc write inhibit is from 1.5V to 2.5V
10.3. Absolute Maximum Ratings
RATING
Ambient Operating
Temperature
Storage Temperature
Applied Input Voltage
Applied Output Voltage
VCC to Ground Potential
10.4. Pinning
8-PIN SOP (150mil)
SYMBOL
CS#
SI
SO
SCLK
HOLD#
VCC
GND
VALUE
0°C to 70°C
-55°C to 125°C
-0.5v to 4.6v
-0.5v to 4.6v
-0.5v to 4.6v
DESCRIPTION
Chip select
Serial Data Input
Serial Data Output
Clock Input
Hold, to pause the device without
deselecting the device
+3.3v Power Supply
Ground
43
LC-32LE240
LC-40LE240