Table of Contents
Advertisement
6-1. EXPLANATION OF IC TERMINALS
• IC18 MPD784218AGC-158-8EU (Program, System control) (1/2)
Pin No.
Pin name
1
P120
2
P121
3
P122
4
P123
5
P124
6
P125
7
P126
8
P127
9
VDD
10
X2
11
X1
12
VSS
13
XT2
14
XT1
15
RESET
16
P00
17
P01
18
P02
19
P03
20
P04
21
P05
22
P06
23
AVDD
24
AVREF0
25
P10
26
P11
27
P12
28
P13
29
P14
30
P15
31
P16
32
P17
33
AVSS
34
ANO0/P130
35
ANO1/P131
36
AVREF1
37
SI2
38
SO2
39
SCK2
40
SI1
41
SO1
42
SCK1
43
P23
44
P24
45
SI0
46
SO0
SECTION 6
DIAGRAMS
I/O
I
Error signal input from DIR.
I
No audio signal input from DIR.
I
EMPHASIS signal input from DIR.
I
F0 signal input from DIR.
I
F1 signal input from DIR.
I
F2 signal input from DIR.
I
STATE signal input from DIR.
I
Serial data signal input from DIR.
I
Power supply terminal.
O
Connect for crystal for main clock oscillator (8MHz).
I
Connect for crystal for main clock oscillator (8MHz).
—
Ground Terminal.
—
Not used (OPEN).
—
Not used (Fixed at "L").
I
Reset signal input.
O
SPI SLAVE select signal output.
O
Decorder CS signal output.
O
DIR CS signal output.
O
CS signal output for DA converter.
O
DIAT latch signal output.
I
Serial date input from decoder.
—
Not used (OPEN).
—
Power supply terminal.
—
Ground Terminal.
I
Not used (OPEN).
—
Not used (OPEN).
I
Not used (OPEN).
I
Not used (OPEN).
I
Not used (OPEN).
I
Not used (OPEN).
—
Not used (OPEN).
I
Not used (OPEN).
—
Analog ground terminal.
—
Not used (OPEN).
—
Not used (OPEN).
I
Power supply terminal.
I
DIR serial data input.
O
DIR serial data output.
O
DIR serial clock output.
I
Main serial data input.
O
Main serial data output.
O
Main serial clock output.
I
Main DSP request signal input.
—
Not used (OPEN).
I
Serial data input.
O
Serial data output.
Description
DP-IF8000
13
Advertisement
Table of Contents
