Signal System For The 8255 Block, The 8253 Block And The Ipo Block - Sharp MZ-80B Owner's Manual

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4.3 Signal system for the 8255 block; 8253 block and PIO block
This section describes the configuration of signal systems for the 8255 block, 8253 block and PIO
block, which perform essential roles in system control.
Connection of the 8255 , 8253 and PIO chips in the input/output ports is shown below, together
with a summary of the service modes of the port of each controller.
Table 4.2
CPU's
Input/Output port
Controller Service mode of each port
$EO PA output
$El
PB input
8255
$E2 Pc output
$E3 mode control
$E4
Co
mode 2 (16 bit rate generator)
$E5
8253
cl
mode 2 (16 bit rate generator)
$E6
Cz
mode 2 ( 16 bit rate gen erator)
$E 7
mode control
$E8
A output mode 3 (bit control)
$E9
mode control A
Z80A-PIO
$EA
B input mode 3 (bit control)
$EB
mode control B