Digital Signal Process Block Diagram - JVC LT-19D200 Service Manual

DIGITAL SIGNAL PROCESS BLOCK DIAGRAM

DIGITAL MAIN PWB UNIT
TO VIDEO
BLOCK DIAGRAM
TO VIDEO
BLOCK DIAGRAM
TO AUDIO
BLOCK DIAGRAM
TMDS-D0(+)
7
TMDS-D0(-)
9
TMDS-D1(+)
4
TMDS-D1(-)
6
TMDS-D2(+)
JK3701
1
HDMI-IN1 TMDS-D2(-)
3
TMDS-CLOCK(+)
10
TMDS-CLOCK(-)
12
SDA
16
SCL
15
TMDS-D0(+)
7
TMDS-D0(-)
9
TMDS-D1(+)
4
TMDS-D1(-)
6
JK3702 TMDS-D2(+)
1
HDMI-IN2
TMDS-D2(-)
3
TMDS-CLOCK(+)
10
TMDS-CLOCK(-)
12
SDA
16
SCL
15
IC3301 (DIGITAL SIGNAL PROCESS)
VGA-R-IN
T2
VGA-G-IN
T1
VGA-B-IN
T3
VIDEO-IN
AA3
S-VIDEO-C-IN
V3
S-VIDEO-Y-IN
U3
A/D
COM-VIDEO-Y-IN SW
CONVERTER
U1
COM-VIDEO-Pb-IN
V1
COM-VIDEO-Pr-IN
U2
DVD-Y
W1
DVD-Pb
Y1
DVD-Pr
W2
DIF-OUT1
AE2
DEMODULATOR
DIF-OUT2
/MPEG DECODER
AF2
IF-AGC
AF7 IF-AGC
S-VIDEO-SW
C6 S-VIDEO-SW
DVD-AUDIO(L)
L1
DVD-AUDIO(R)
L2
AUDIO(L)
M1
AUDIO(R)
M2
BCLK
AD9
LRCLK
AUDIO I/F
AD12
ACLK
AD10
SHD-SPDIF
AD11
ADATA0
AC10
A9
B9
AUDIO
DECODER
C8
C9
B8
A8
B10
A10
A11
B11
HDMI
I/F
A5
B5
C4
C5
B4
A4
VIDEO
B6
DECODER
A6
A7
B7
(No.YA711<Rev.001>)2-13
IC3901 (TINING CONTROLLER)
DATA
PROCESSING
GAMMA
CORRECTOR
FRC
LINE BUFFER
LVDS
AD23 8
TX
AD24 7
AE23 10
AF23
9
AF22 12 LVDS
RX
AE22 11
AD21 16
AD22 15
DIGITAL
AF24 14
SIGNAL
PROCESS
AE24 13
IC3201
(DDR2 SDRAM)
B1,B9,C2,C8,
A13-15,A18,
D1,D3,D7,D9,
A21-23,B13-15,
DATA(0-15)
F1,F9,G2,G8,
B17,B19-23
H1,H3,H7,H9
C15,C17-19,
M2,M3,M7,M8,
C23,C24,D14, N2,N3,N7,N8, ADDESS(0-12)
D15,D17-19,
P2,P3,P7,P8,R2
D22,D23
2-14(No.YA711<Rev.001>)
VIDEO SIGNAL AUDIO SIGNAL
CN3902
48 23 LLV0(+)
47 22 LLV0(-)
46 21 LLV1(+)
45 20 LLV1(-)
44 19 LLV2(+)
43 18 LLV2(-)
38 13 LLV3(+)
37 12 LLV3(-)
36 11 LLV4(+)
35 10 LLV4(-)
LVDS
OUTPUT
34 9 LLV5(+)
33 8 LLV5(-)
42 16 LLVCLKP
41 15 LLVCLKN
63 6 TP
64 5 POL
30 4 CPV
31 3 OE1
32 1 STV
DATA
INPUT
LATCH
LCD PANEL
UNIT