Sharp LC-26GA5F Service Manual page 112

LC-26GA5E
LC-26GA5E
LC-32GA5E
LC-32GA5E
3.3. Description of Pins IC2201, continued
Table 2-4 Display/Odd Port Pin Descriptions (continued)
Name
DOG0
DOG1
DOG2
DOG3
DOG4
DOG5
DOG6
DOG7
DOB0
DOB1
DOB2
DOB3
DOB4
DOB5
DOB6
DOB7
Table 2-5 provides detailed Microprocessor Interface pin descriptions.
Table 2-5 Microprocessor Interface Pin Descriptions
Name
WR
RD
ROMOE
ROMWE
CS0
CS1
NMI
Pin(s) Type
121 I/O SR5
120 I/O SR5
119 I/O SR5
118 I/O SR5
DOPort Green Pixel Data. In dual pixel output mode these pins are the
ODD green outputs. In single pixel output mode these pins are not used.
117 I/O SR5
116 I/O SR5
115 I/O SR5
114 I/O SR5
113 I/O SR5
112 I/O SR5
111 I/O SR5
110 I/O SR5
DOPort Blue Pixel Data. In dual pixel output mode these pins are the ODD
blue outputs. In single pixel output mode these pins are not used.
109 I/O SR5
108 I/O SR5
100 I/O SR5
99 I/O SR5
Pin(s) Type
Write Enable. Low indicates a write to external RAM or other devices.
195 I/O D5
Read Enable. Low indicates a read to external RAM or other devices.
196 I/O D5
ROM Output Enable. Low output indicates a read from external ROM.
197 OS
ROM Write Enable. Low indicates a write to external ROM.
198 OS
Miscellaneous Chip Select 0. Low selects external devices.
199 I/O D5
Miscellaneous Chip Select 1. When EXTRAMEN=0, low selects external
devices.
200 I/O D5
Chip select for external RAM. When EXTRAMEN=1, low selects external
RAM. (RAMCS)
Non-Maskable Interrupt. A high input triggers a non-maskable interrupt to
194 ID 5
the on-chip microprocessor.
Function
Function
112
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