LG U8120 Service Manual page 241

9. CIRCUIT DIAGRAM
1 1 2 2 3 3
A A
B B
C C
VDIG
D D
RF CONTROL
WSTR
RF RX DATA
RF TX DATA
E E
HSSL LINK (MARITA)
CLK INTERFACE
VINCENNE INTERFACE
F F
G
G
H H
1 1 2 2 3 3
4 4 5 5 6 6
1.5V
VCORE
VCORE
G16
JTAG_TRSTN
G17
JTAG_TCK
G15
JTAG_TMS
F16
JTAG_TDI
G13
JTAG_TDO
E15
EMU1
F13
EMU0
Q3204 PMST3904 R17
WCLK RADIO_CLK
P15
WDAT RADIO_DAT
M13
RADIO_STR
R3326 R10
RXIA ADC_I_IN
N10
NA RXIB ADC_I_IN_INV
R9
RXQA
ADC_Q_IN
T9
RXQB ADC_Q_IN_INV
T10
ADC_RXEXTREF_P
N9
ADC_RXEXTREF_N
C2400 0.1u M16
ADCSTR AD_STR
N8
TXIA DAC_I_OUT
U8
TXIB DAC_I_OUT_INV
U7
TXQA
DAC_Q_OUT
R7
TXQB
DAC_Q_OUT_INV
T7
DAC_TXEXTRES
B16
HSSLTX HSSLRX_D
A16
HSSLRXCLK
HSSLTX_CLK
A15
HSSLRX HSSLTX_D
C14
HSSLTXCLK HSSLRX_CLK
D4
ID_BALL
A13
ISSYNCn
IS_SYNC_N
B12
ISEVENTn IS_EVENT_N
U12
APLL_ATEST1
C2103 U13
MCLK MCLK
330p T16
RTCCLK CLK32
R15
HCLK
T15
CLKREQ CLKRQ
N13
RESOUT1n
RESET_N
N15
DACCLK DAC_CLK
L13
DACDAT DAC_DAT
M15
DACSTR
DAC_STR
E12
TP2119
UART_TX
C13
TP2116 UART_RX
1%
R2120
NA
C2215
0.1u
R2400
43K
4 4 5 5 6 6
7 7 8 8 9 9
VEXT15 WANDAVDDA
1.5V 1.5V 1.5V
VCORE WANDAVDDD
VCORE VRTC VEXT15
C2227
0.1u
C2229
0.1u
C2233
0.1u
C2238
0.1u
C2234
0.1u
C2231
0.1u
C2236
0.1u
C2241
0.1u
C2237
C2240 0.1u
0.1u
C2239
0.1u
C2235
0.1u
C2230
0.1u C2232
0.1u
C2228
0.1u
C2224
0.1u
C2226
0.1u C2225
0.1u
C2
EMIF_D0
C1
EMIF_D1
F5
EMIF_D2
E3
EMIF_D3
G5
EMIF_D4
E1
EMIF_D5
F2
EMIF_D6
F1
EMIF_D7
G3
EMIF_D8
G2
EMIF_D9
H5
EMIF_D10
H1
EMIF_D11
H2
EMIF_D12
J2
EMIF_D13
J3
EMIF_D14
J5
EMIF_D15
K3
EMIF_D16
K5
EMIF_D17
K1
EMIF_D18
L1
EMIF_D19
L3
EMIF_D20
M2
D2006
EMIF_D21
L5
EMIF_D22
N1
ROP-101-3033_1 EMIF_D23
M3
EMIF_D24
M5
EMIF_D25
P2
EMIF_D26
P3
EMIF_D27
R2
EMIF_D28
T1
EMIF_D29
N5
EMIF_D30
U1
EMIF_D31
U3
EMIF_AWE_N
T3
EMIF_ARE_N
U2
EMIF_AREADY
N12
EXT_MEM_UBUS10
T14
EXT_MEM_UBUS11
R14
EXT_MEM_UBUS12
E17
EXT_FRAME_STROBE
N6
CPU_IACK
R5
CPU_XF
N7
CPU_IRQ1
R6
CPU_IRQ0
M17
CPU_CLKOUT
Changed by:
mentor
7 7 8 8 9 9
- 242 -
10 10 11 11 12 12
TP2120
Engineer:
LG ELECTRONICS INC.
MYUNG-LAE, CHO
3G HANDSETS LAB.
Drawn by:
DEVELOPMENT GROUP 1
MYUNG-LAE, CHO
R&D CHK:
TITLE:
BB MAIN PCB
DOC CTRL CHK:
WANDA
MFG ENGR CHK: U8120 PT V1.3 STG INTEL PAM
Date Changed: Time Changed: QA CHK: REV: Drawing Number:
Tuesday, September 04, 2003 9:42:54 am
10 10 11 11 12 12
A A
B B
C C
D D
E E
F F
G
G
H H
Size:
A2
12 1 8 A
Page:
8