LG U8120 Service Manual page 239

9. CIRCUIT DIAGRAM
1 1 2 2 3 3
A A
R2100
RTCCLK
47
ONSWC
C2100 and C2101 close to B2100
32.768KHz C2100
22p
TP3317
B B
RTC_GND
TP2106
R3100
C
NA
R2123 TP2100 TP2101
B Q2100
VPPFLASH
RN1107
120K
C2102 330p P13
E
MCLK
TP3126
SYSCLK1
R2109 47
SYSCLK2
PWRRSTn
RESOUT0n
RESOUT1n
TP2102
RESOUT3n
C C C2104
1000p
PWRREQn
ISSYNCn
ISEVENTn
CLKREQ
M14
P18
BL_PWL
R21
7C_LED_VDD_EN
CAMERA_DET
AA2
GPIO05
AMPCTRL
TP3313
TGBUZZ
UART0 UARTRX0
UARTTX0
D D IRQ0n UARTRX1
AA5
UART1 UARTTX1
UARTRTS1
UARTCTS1
VDIG
CAM_REG_EN
CAM_FLASH_ON
P10
TP2125
P15
CAM_FLASH_SHOT
N14
W20
PULSESKIP
V19
W21
U18
T18
U19
KEY_LED_ONOFF
U20
N15
U21
LCDVSYNCI
T19
SPKMUTE
T20
R19
E E USBSENSE
R18
V17
BL_EN
AA21
FOLDER_DET
D2012 1SS388 Y19
EN_LED_R
AA20
EN_LED_G
W19
EN_LED_B
Y20
IRDA_REG_CTRL
DACCLK
DAC DACDAT
DACSTR
ADCSTR
J15
USBDP
USB J20
USBDM
H19
USBPUEN
HSSLRXCLK
HSSLRX
HSSL
F F
HSSLTXCLK
HSSLTX
TP2404 L14
TP2405
TP2401
TP2402
TP2403
MARITATCK
MARITATMS
MARITATDI
JTAG I/F
MARITATDO
G G MARITATRST
MARITARTCK
MARITATEMU0
MARITATEMU1
IrDA
H H
1 1 2 2 3 3
4 4 5 5
VDDC 1.5V
VDDE 1.5V 1.8V
VDDC 1.5V
VEXT15
VCORE VCORE VMEM
RF I/F
0.1u 0.1u 0.1u 0.1u 0.1u 0.1u
C2221 C2220 C2223 C2244 C2247 C2255 C2250
0.1u 0.1u 0.1u 0.1u 0.1u 0.1u
C2101
C2218 C2222 C2243 C2246 C2256 C2257
22p
0.1u 0.1u 0.1u 0.1u 0.1u 0.1u
C2217 C2216 C2242 C2245 C2219 C2258
MCLK
R3
SYSCLK0
T2
SYSCLK1
T3
SYSCLK2
L3
SERVICE_N
R2
RESPOW_N
F4
RESOUT0_N
L1
RESOUT1_N
P8
RESOUT2_N
U2
RESOUT3_N
U3
RESOUT4_N
M8
CLKREQ
T4
PWRREQ_N
M3
ISSYNC_N
M4
ISEVENT_N
V2
IRQ0_N
GPIO00
GPIO01
GPIO02
R8
GPIO03
P9
GPIO04
GPIO05
Y3
GPIO06
W4
GPIO07
V5
GPIO10
Y4
GPIO11
V6
GPIO12
W5
GPIO13
Y5
GPIO14
GPIO15
W6
GPIO16
V7
GPIO17
W7
GPIO20
Y7
GPIO21
GPIO22
D2000
GPIO23
GPIO24
ROP-101-3035_1
GPIO25
GPIO26
MARITA
GPIO27
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
P3
DACCLK
P2
DACDAT
P4
DACSTR
P7
ADCSTR
USBDP
USBDM
USBPUEN
N3
HSSLRXCLK
N8
HSSLRX
N4
HSSLTXCLK
N7
HSSLTX
NC0
E5
NC
VIRDA
N3100
CIM-80S7B-T
7
GND
C3137
6
VCC
0.47u
1608
5 KEY I/F PCM I/F
SD
4
RXD
8
SHIELD
3
TXD
2
LEDK
1
LEDA
SIR TRANCEIVER
SD(L:ACTIVE, H:SHUTDOWN)
LOW POWER MODE : LEDA VCC
4 4 5 5
6 6 7 7 8 8
* MEMORY CHANGE HISTORY
U8100 WS01-1 MCP 64/08.
U8100 WS01-2 64/64/16
U8100 WS01-3 64/64/16
U8100 WS01-4 2002.09.13 64/64/16
64/64/16
2.75V 1.8V 3.3V 1.5V 1.5V
U8100 WS01-5 64/64/16
64/64/16
VDIG VMEM VUSB VRTC VEXT15
U8100 ES01-1 DEFAULT 64/64/16
64/64/16
OPTION 64D/64D/16PS
128L/128L
U8100 ES01-2 64/64/16
64/64/16
U8100 ES01-3 TOSHIBA 128/128/64
128
0.1u 0.1u 0.1u U8100 ES01-6 TOSHIBA 128/128/64
C2253 C2262 128
OPTION 128/128
0.1u 0.1u 0.1u
C2252 C2263 C2260
0.1u 0.1u 0.1u
C2251 C2259 C2261
ADR(1:24)
C17
A1 ADR(1)
B17
A2 ADR(2)
G13
A3 ADR(3)
C16
ADR(4)
A4
C15
ADR(5)
A5
B15
ADR(6)
A6
H12
A7 ADR(7)
D14
A8 ADR(8)
B14
A9 ADR(9)
C14
ADR(10)
A10
G12
ADR(11)
A11
B13
ADR(12)
A12
C13
A13 ADR(13)
H11
A14 ADR(14)
D12
A15 ADR(15)
C12
ADR(16)
A16
G11
ADR(17)
A17
D11
ADR(18)
A18
C11
A19 ADR(19)
H10
A20 ADR(20)
C10
ADR(21)
A21
D10
ADR(22)
A22
H9
ADR(23)
A23
C9
A24 ADR(24)
DAT(0:15)
A7
D0 DAT(0)
B7
D1 DAT(1)
C7
DAT(2)
D2
D7
DAT(3)
D3
C6
DAT(4)
D4
B5
D5 DAT(5)
C5
D6 DAT(6)
D6
DAT(7)
D7
B4
DAT(8)
D8
C4
DAT(9)
D9
D5
D10 DAT(10)
B3 VMEM
D11 DAT(11)
D4
D12 DAT(12)
C3
D13 DAT(13)
B2
DAT(14)
D14
A1 CS2 not used
DAT(15)
D15
J8
CS0_N MEM_CS0_N
H7
CS1_N MEM_CS1_N
B10
CS2_N
D9
CS3_N MEM_CS3_N
C8
WE_N MEM_WE_N
D8
OE_N MEM_OE_N
C1
MEMBE0_N MEM_BE0_N
D3
MEMBE1_N MEM_BE1_N
B9
MEMADV_N MEM_ADV_N
G8
MEMCLK MEM_CLK
D2
MEMWAIT_N
D19
PDIRES_N LCDRESX
C19
PDIC0 LCDCSX_SUB
D18
PDIC1 LCDWRX
C20
PDIC2 LCDRS
C21
PDIC3 LCDCSX_MAIN
E18
PDIC4 LCDRDX LCD I/F
B18
PDID0 PDID0
D17
PDID1
PDID1
C18 VDIG
PDID2 PDID2
B19
PDID3 PDID3
A20
PDID4 PDID4
H13
PDID5 PDID5
G14
PDID6 PDID6
B20
PDID7 PDID7
Y2
I2CSCL
W3
I2CSDA I2CDAT
H18
CIPCLK CIPCLK
H15
CIVSYNC CIVSYNC
G21
CIHSYNC CIHSYNC
E19
CIRES_N
CIRES_N
E20
CID0 CID0
E21
CID1 CID1
H14
CID2 CID2
F19
CID3 CID3
F20
CID4 CID4
G18
CID5 CID5
G19
CID6 CID6
G20
CID7 CID7
CAMERA I/F
VDIG
VCORE VDIG
I2CCLK
RTC_GND
R3333 NA
I2CCLK_CAMERA
6 6 7 7 8 8
- 240 -
9 9 10 10 11 11
0.8 PITCH 14 X 8 X 1.4
U8100 PT V1.0 NMBI TOSHIBA 128/128/64 0.8 PITCH 9 X 12 X 1.4
0.8 PITCH 10 X 8 X 1.4
128 0.8 PITCH 9 X 12 X 1.4
0.8 PITCH 10 X 8 X 1.4
U8100 PT V1.0 Staggered TOSHIBA 128/128/64 0.8 PITCH 9 X 12 X 1.4
0.8 PITCH 10 X 8 X 1.4 128 0.8 PITCH 9 X 12 X 1.4
0.8 PITCH 10 X 8 X 1.4
U8100 PT V1.1 Staggered AMD 128/128/64 0.8 PITCH 9 X 12 X 1.25
0.8 PITCH 10 X 8 X 1.4
128 0.8 PITCH 9 X 11.5 X 1.0
0.8 PITCH 10 X 8 X 1.4
U8120 PT V1.1 Staggered INTEL 256/64 0.8 PITCH 8 X 11 X 1.2
256 0.8 PITCH 8 X 11 X 1.0
0.8 PITCH 10 X 8 X 1.4
option-128 0.8 PITCH 8 X 10 X 1.2
0.8 PITCH 10 X 8 X 1.4
0.8 PITCH 10 X 8 X 1.4
0.8 PITCH 10 X 8 X 1.4
0.8 PITCH 10 X 8 X 1.4
0.8 PITCH 10 X 8 X 1.4
ADDRESS X DATA = 2^24 X 2^4 = 2^28 =256MBIT
0.8 PITCH 9 X 12 X 1.4
A23 = 256MBIT
0.8 PITCH 9 X 12 X 1.4
DAT(0:15)
0.8 PITCH 9 X 12 X 1.4
0.8 PITCH 9 X 12 X 1.4 Rout track on inner layer
J7 E3 ADR(1:24)
DAT(15)
0.8 PITCH 9 X 12 X 1.4 D15 A25
H6 D3
DAT(14)
D14 A24
G6 C3
DAT(13) ADR(24)
D13 A23
H5 C7
DAT(12) D12 A22 ADR(23)
J4 B7
DAT(11) D11 A21 ADR(22)
G4 E6
DAT(10) D10 A20 ADR(21)
J3 B3
DAT(9) ADR(20)
D9 A19
G2 B2
DAT(8) ADR(19)
D8 A18
H7 D2
DAT(7) ADR(18)
D7 A17
J6 F8
DAT(6) D6 A16 ADR(17)
G5 E8
DAT(5) D5 A15 ADR(16)
J5 F7
DAT(4) D4 A14 ADR(15)
H4 D8
DAT(3) ADR(14)
D3 A13
G3 C8
DAT(2) ADR(13)
D2 A12
H3 B8
DAT(1) ADR(12)
D1 A11
H2 E7
DAT(0) D0 A10 ADR(11)
D7
A9 ADR(10)
K3 F6
_F3_CE A8 ADR(9)
G8 E2
ADR(8)
_F2_CE A7
K1 F2
ADR(7)
MEM_CS0_N _F1_CE A6
C1
ADR(6)
A5
CS 0,3 C5 B1
S_CS2 A4 ADR(5)
J1 D1
_S_CS1 A3 ADR(4)
E1
A2 ADR(3)
VMEM D6 F1
ADR(2)
MEM_CS3_N _P1_CS A1
K2 G1
ADR(1)
_P2_CS U3103 A0
RD38F4050L0YTQ0
K8
P_MODE
C6
MEM_CLK CLK
MCP
G7
MEM_WAIT_N WAIT
F4
RESOUT0n _F_RST
E4
_F_WP
E5
MEM_ADV_N _ADV
B6
F2_VCC1
H8 K6
_F2_OE F2_VCC2
J2
MEM_OE_N _F1_OE
H1
_R_OE
B5
F1_VCC1
F5 L4
MEM_WE_N _F_WE F1_VCC2
D5
_R_WE
F3
MEM_BE1_N _R_UB
C2
MEM_BE0_N _R_LB
J8
VCCQ2
B4 K7
VSS7 VCCQ1
C4 L3
VSS6 VCCQ0
L1
VSS5
L2 K4
VSS4 S_VCC
L5
VSS3
L6 K5
VSS2 P_VCC
L7
VSS1
L8 D4
VSS0 F_VPP
C3133 C3135
C3136
0.1u 0.1u
0.22u
50V 1608
VMEM
R3400 0
V2203
VPPFLASH_MEM
RB521S-30
NA
ADDRESS X DATA = 2^24 X 2^4 = 2^28 =256MBIT
A23 = 256Mbit, A22=128Mbit
DAT(0:15)
MEM_WAIT_N
Rout track on inner layer
Short-256Mbit ADR(1:24)
J7 E3
DAT(15) D15 A25
Open-128Mbit
H6 D3
DAT(14) D14 A24
G6 C3 R3399 0
DAT(13) ADR(24)
D13 A23
H5 C7
DAT(12) ADR(23)
D12 A22
J4 B7
DAT(11) ADR(22)
D11 A21
G4 E6
DAT(10) D10 A20 ADR(21)
J3 B3
DAT(9) D9 A19 ADR(20)
G2 B2
DAT(8) ADR(19)
D8 A18
H7 D2
DAT(7) ADR(18)
D7 A17
J6 F8
DAT(6) ADR(17)
D6 A16
G5 E8
DAT(5) D5 A15 ADR(16)
J5 F7
DAT(4) D4 A14 ADR(15)
H4 D8
DAT(3) D3 A13 ADR(14)
G3 C8
DAT(2) D2 A12 ADR(13)
H3 B8
DAT(1) ADR(12)
D1 A11
H2 E7
DAT(0) ADR(11)
D0 A10
D7
ADR(10)
A9
CS1 K3 F6
_F3_CE A8 ADR(9)
G8 E2
_F2_CE A7 ADR(8)
K1 F2
MEM_CS1_N ADR(7)
_F1_CE A6
C1
ADR(6)
A5
C5 B1
ADR(5)
S_CS2 A4
J1 D1
_S_CS1 A3 ADR(4)
E1
A2 ADR(3)
VMEM D6 F1
_P1_CS A1 ADR(2)
K2 G1
_P2_CS U3104 A0 ADR(1)
NZ48F4000L0YBQ0
K8
P_MODE
C6
MEM_CLK CLK
G7
MEM_WAIT_N WAIT FLASH
F4
RESOUT0n _F_RST
E4
_F_WP
E5
MEM_ADV_N _ADV
B6
F2_VCC1
H8 K6
_F2_OE F2_VCC2
J2
MEM_OE_N _F1_OE
H1
_R_OE
B5
F1_VCC1
F5 L4
MEM_WE_N _F_WE F1_VCC2
D5
_R_WE
F3
_R_UB
C2
_R_LB
J8
VCCQ2
B4 K7
VSS7 VCCQ1
C4 L3
C3276
VSS6 VCCQ0
L1
VSS5
0.1u
L2 K4
VSS4 S_VCC
L5
VSS3
L6 K5
VSS2 P_VCC
L7
VSS1
L8 D4
VSS0 F_VPP VPPFLASH_MEM
C3225
0.22u
50V 1608
Engineer:
LG ELECTRONICS INC.
SUNG-JU, YOU
3G HANDSETS LAB
Drawn by:
SUNG-JU, YOU DEVELOPMENT GROUP1
R&D CHK: TITLE:
BB MAIN PCB
DOC CTRL CHK:
MARITA
MFG ENGR CHK: U8120 PT V1.3 STG INTEL PAM
Changed by: Date Changed: Time Changed: QA CHK: REV: Drawing Number:
mentor Tuesday, September 04, 2003 9:42:54 am
9 9 10 10 11 11
12 12
A A
B B
C C
VMEM
D D
C3134
0.1u
E E
F F
VMEM
G G
C3222
0.1u
H H
Size:
A2
12 1 8 A
Page:
6
12 12