Ic Data - Yamaha rx-sl100 Service Manual

RX-SL100/RX-SL100RDS
Q Q
3 7 6 3 1 5 1 5 0
I IC DATA
IC304: YSS938 (DIGITAL P.C.B)
DSP
XO 1
XI 2
SELI1 3
SELI0 4
SELOA 5
SELOB 6
TESTMS 7
TESTXEN 8
IPORT0 9
IPORT1 10
IPORT2 11
IPORT3 12
IPORT4 13
DDIN0 14
DDIN1 15
DDIN2 16
DDIN3 17
VSS 18
CPO 19
AVDD 20
21
DIRPCO
DIRPRO 22
AVSS 23
TESTBRK 24
TESTR1 25
TESTR2 26
VDD1 27
SDWCKI0 28
SDBCKI0 29
/SDBCKO 30
IPORT8 31
IPORT9 32
33
IPORT10
IPORT11 34
SDIA 35
SDOA2 36
SDOA1 37
SDOA2 38
SDIB3 39
SDIB2 40
T E
L 1 3 9 4 2 2 9 6 5 1 3
External
OVFSEL
Memory
Interface
SDOB3
SDOB2
SDOB1
SDOB0
SDOBCKSEL SDIBCKSEL
SDWCKI1
SDBCKI1
Coefficient,
MPLOAD
w w w
Program
RAM
SELOA
SELOB
SELB SELA
38
120 RAMA9
119 RAMA3
118 RAMA4
117 SELI9
116 SELI10
115 SELI11
114 SELI12
113 SELI13
112
RAMA2
111 RAMA5
110 RAMA1
109 RAMA6
108 RAMA0
107 RAMA7
106 RAMA8
105 VDD1
104 VSS
103 RASN
102 RAMOEN
YSS938 101 RAMWEN
100
CASN
99 RAMD15
98 RAMD14
97 RAMD13
96 RAMD12
95 RAMD11
94 RAMD10
93 RAMD9
92 RAMD8
91 VDD1
90 VSS
89 RAMD7
88 RAMD6
87 RAMD5
86 RAMD4
85 ZEROBF0L
84 ZEROBF0R
83 ZEROBF1L
82 ZEROBF1R
81 RAMD3
V
ERR
BS
Control Signals
SYNC
Control Register
U
µ-COM Interface
x a o FS128
y
C
. i
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IC304: YSS938 (DIGITAL P.C.B)
DSP
No. Name
1 XO
2 XI
3 SELI1
4 SELI0
5 SELOA
6 SELOB
7 TESTMS
8 TESTXEN
9 IPORT0
10 IPORT1
11 IPORT2
12 IPORT3
13 IPORT4
14 DDIN0
15 DDIN1
16 DDIN2
17 DDIN3
18 VSS
19 CPO
20 AVDD
21 DIRPCO
22 DIRPRO
23 AVSS
24 TESTBRK
Q Q
25 TESTR1
3 7 6
26 TESTR2
27 VDD1
28 SDWCKI0
29 SDBCKI0
30 /SDBCK0
31 IPORT8
32 IPORT9
33 IPORT10
34 IPORT11
/LOCK
35 SDIA
36 SDOA2
37 SDOA1
DBL/V
38 SDOA0
39 SDIB3
ERR/BS 40 SDIB2
41 SDIB1
42 SDIB0
DDIN3
43 VSS
DDIN2
44 VDD2
DDIN1
45 IPORT12
DDIN0
46 IPORT13
DIRINT
47 IPORT14
48 DIRSDO
SYNC/U
49 DIRWCK
50 DIRBCK
u 1 6 3
FS128/C
51 DIRMCK
52 ERR/BS
.
53 SYNC/U
54 FS128/C
55 DBL/V
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2 4
8 9 9
I/O Function
O Crystal oscillator connecting terminal
I Crystal oscillator connecting terminal (24.576MHz)
I+ Built-in selector input 1 (Unconnected)
I+ Built-in selector input 0
O+ Built-in selector output A
O+ Built-in selector output B (Unconnected)
I+ Test terminal (Unconnected)
I+ Test terminal (Unconnected)
I+ General purpose input terminal
I+ General purpose input terminal
I+ General purpose input terminal
I+ General purpose input terminal
I+ General purpose input terminal
Is DIR: Digital audio interface data input terminal 0
Is DIR: Digital audio interface data input terminal 1/General purpose input terminal
Is DIR: Digital audio interface data input terminal 2/General purpose input terminal
Is DIR: Digital audio interface data input terminal 3/General purpose input terminal
Ground terminal
A PLL filter connecting terminal
+3.3V power terminal (for DIR)
A DIR: PLL filter connecting terminal
A DIR: PLL filter connecting terminal
Ground terminal (for DIR)
I+ Test terminal (Unconnected)
I+ PLL initialization signal input terminal for DSP
3 1 5 1 5 0 8 9 2
I+ Test terminal (Unconnected)
+3.3V power terminal (for terminal section)
I+ Word clock input terminal for SDIA, SDOA, SDIB, SDOB interface (Unconnected)
I+ Bit clock input terminal for SDIA, SDOA, SDIB, SDOB interface (Unconnected)
O DIRBCK or SDBCKI0 invert clock output terminal (Unconnected)
I+ IPINT general purpose input terminal
I+ IPINT general purpose input terminal
I+ IPINT general purpose input terminal
I+ IPINT general purpose input terminal
I AC-3/DTS bit stream (or PCM) data input terminal to Main DSP
O PCM output terminal from Main DSP (C/LFE output) (Unconnected)
O PCM output terminal from Main DSP (LS/RS output) (Unconnected)
O PCM output terminal from Main DSP (L/R output)
I+ PCM input terminal 3 to Sub DSP
I+ PCM input terminal 2 to Sub DSP
I+ PCM input terminal 1 to Sub DSP
I+ PCM input terminal 0 to Sub DSP
Ground terminal
+2.5V power terminal (for internal circuit)
I+ IPINT general purpose input terminal
I+ IPINT general purpose input terminal
I+ IPINT general purpose input terminal
O AC-3/DTS bit stream (or PCM) data output terminal from DIR
m
O DIR: Serial data word clock (fs) output terminal
O DIR: Serial data bit clock (64fs) output terminal
c o
O DIR: Serial data master clock (256fs or 128fs) output terminal
O DIR: Data error detect output/block start output terminal (Unconnected)
O DIR: Serial data synchronous timing output/user data output terminal (Unconnected)
O DIR: Serial data master clock 128fs output/channel status output terminal (Unconnected) (FS128)
O DIR: Double rate clock output/validity flag output terminal
2
8 9 9
(AXD)
(GND)
(ISEL)
(RSEL)
(CXDTA)
(CXDTB)
(ISEL)
(Pull down)
(Pull down)
(Pull down)
(/ICD)
4 9 8 2 9 9
(WCKG)
(BCKG)
(NONPCM)
(NONPCM)
(MUTE)
(SDIA)
(DIRINT)
(DBL)
(DBL)
(WCK)
(BCK)
(MCK)
(DBL)