Yamaha GX-700 Service Manual page 54

A B C
GX-700/GX-700VCD
SCHEMATIC DIAGRAM (GX-700VCD VCD)
1
2
3
4
ACT
MOTOR
DRIVE
6.3 6.3
2.5
6.2
2.4 2.4
2.4 2.4
2.4 2.7
3.0 2.7
5 0
0
0
0
0
0
2.8 3.1
2.7 2.4
2.4 2.4
2.4
6.2
0
6
0
7
8
MOTOR DRIVE
9
VCD (1)
10
67
D E F
CD HEAD AMP
0
2.5
SPC & DAC
1.2
2.5
2.2
4.9
0
0
2.4
2.3
4.9
q
2.4
0.8
2.5
w
0
4.7
0
6.2
0
G H
4.8 5.5
REGULATOR
REGULATOR
4.9 8.5
6.3 11.1
7.9
1.8
6.8
6.8
1.2 7.9
0 1.2
0
0
1.2
6.8
0
2.7
0
0 0
0
0
4.8
14
4.8 12 4.8
11
13
0
4.8
14
4.8 10 11 0
4.8
10
~ 9 4.8
8
4.8
4
5 6 ~
0
0 8 9 4.8
0 0 7
1
2 3 ~
~
0
4.3
4.9
0
~
4.8
0
0
0
0
4.8
~
~
0
0
4.9
2.4
2.4
2.4
4.8
4.8
0
0 0
4.3 0
4.7 0
0
CD CPU
0
2.0 0
2.3 0
0 4.8
0 0
0 0 0
0 0
0 0
0
0
0
0
0 0
4.8 0
0 0
0 0
MUTING
12.4
0
3 8
1 0
0 2
0 -11.9
LPF 0
0
-11.9
0
6
0
7 0
0 5
4
-12.0
Point q (Pin59 of IC5) Point w (Pin39 of IC11)
V : 5V/div H : 50 nsec/div V : 2V/div
DC range 1 : 1 probe DC range
0V 0V
I J K
IC2 : AN8803SB
Digital Servo Head Amp
PDAC
36
+
MAIN(1)
P73
A-2
PDBD 35
+
PDFR 31
PDF 34
+
PDER
32
PDE 33
+
INPUT(1)
P69
A-9
EFFECT(1)
P72
I-5
EFFECT(1)
P72
A-5
2.4 2.4
2 1
VCD (2)
4.9
14
4.9 6 0 3 4.9
5 4
0
7
4.8
1
0 0 2
3 0
7
14
4.8
5 0 6
0
0
4
0 4.8
3 4
4.8 1 0 5
4.8
6
2
CD(Lch)
4.8
4.8
-11.9
IC3, 4 : TA8409S
Full Bridge Motor Driver
VCC VS
2 6
VREF
STAND-BY 8 VREF
CIRCUIT
CIRCUIT
IN 1 9
7 OUT 1
3 OUT 2
IN 2 1
H : 50 nsec/div
1 : 1 probe
THERMAL
SHUTDOWN
CIRCUIT
5
GND
L M N
IC1 : LA6541D
4 Channel BTL Driver
VCC 1 – 30 VCC
+
6 7 29 27 28 8 9 10 17 11 12 19
MUTE 2 29 VREF
11KΩ 11KΩ
LEVEL SHIFT LEVEL SHIFT
VIN1 3 28 VIN4
+ + 1 4
RF
EQ AGC
DETECT VG1 4 27 VG4
VCBA
+
ENV DETECT BTL AMP BTL AMP
VO1 5 26 VO8
1 4
C.SBDO
BDO 13
VO2 6 25 VO7
14 BDO
VCC
VCBA
15 C.SBRT GND 7 24 GND
OFTR
+
+
16 OFTR –
GND 8 23 GND
+
+
VREF
20 GND 9 22 GND
VO3 10 21 VO6
VCBA
+ 5 VCC
BTL AMP BTL AMP
+ VO4 11 20 VO5
18 GND 2 3
VCBA
+ VG2 12 19 VG3
21 LD OFF
LEVEL SHIFT LEVEL SHIFT
VIN2 13 18 VIN3
+ 11KΩ 2 3 11KΩ
+ + 2 LD
+
REG OUT 14 17 CD
+
REG IN 15 REGULATOR RESET 16 RES
30 24 25 26 23 22 1 4 3
VCD MODULE
VZ150200
CONNECTION TERMINAL SPECIFICATION
NO. TERMINAL I/O FUNCTION
1 A+3.3V +3.3V POWER SUPPLY FOR ANALOG VIDEO
2 CVOUT O COMPOSITE VIDEO OUT
3 COUT O C VIDEO OUTPUT (S)
4 YOUT O Y VIDEO OUTPUT (S)
5 VGND ANALOG VIDEO GROUND
6 VGND ANALOG VIDEO GROUND
7 R+5V DIGITAL +5V POWER SUPPLY
8 D+3.3V DIGITAL +3.3V POWER SUPPLY
9 D+3.3V DIGITAL +3.3V POWER SUPPLY
10 DGND DIGITAL GROUND
11 DGND DIGITAL GROUND
12 XCK I AUDIO EXTERNAL FREQUENCY CLOCK
13 EMPH O AUDIO EMPHASIS OUTPUT
14 DILRCK O AUDIO LEFT RIGHT CLOCK
15 HRDY O HOST DATA READY
16 DISCK O AUDIO BIT CLOCK
17 DIDATA O AUDIO DATA SERIAL BUS
18 HINT O HOST INTERRUPT
19 SBCK O SUBCODE CLOCK FOR CD-G
20 VRST I HARDWARE RESET (LOW ACTIVE)
21 HCK I HOST CLOCK
22 HDIO I/O HOST SERIAL DATA BUS
23 CDSCK I CD BIT CLOCK
24 CDDATA I CD DATA
25 CDLRCK I CD LEFT RIGHT CLOCK
26 IPFLG I CD DATA ERROR FLAG (C2P0)
27 HSEL I HOST ADDRESS/DATA SELECT
28 SUBC I SUBCODE DATA FOR CD-G
29 CLDCK I SUBCODE FRAME SYNC FOR CD-G
30 BLKCK I SUBCODE BLOCK SYNC FOR CD-G
NOTE: None of the components of the VCD module can be supplied
separately. Only a VCD module unit (VZ150200) is available.
IC7, 9 : TC74HC125AF
Quad 3 State Bus Buffers
1C 1 14 Vcc
1A 2 13 4C
1Y 3 12 4A
2C 4 11 4Y
5
2A 10 3C
2. SUBCODE INTERFACE
2Y 6 9 3A
GND 7 8 3Y
IC13 : TC74HC04AF
Hex Inverters
1A 1 14 V DD
1Y 2 13 6A
2A 3 12 6Y
2Y 4 11 5A
3A 5 5Y
10
3Y 6 9 4A
V SS 7 8 4Y
3. AUDIO OUTPUT INTERFACE
IC8 : TC74VHC14F
Hex Schmit Trigger Inverters
I1 1 14 V DD
O1 2 13 I6 4. HOST INTERFACE
HOST READ TIMING
I2 3 12 O6
O2 4 11 I5
I3 5 10 O5
O3 6 9 I4
V SS 7 8 O4
µ
IC10 : PC4570G2
Dual OP-Amp
HOST WRITE TIMING
OUT 1 8 +V
1 CC
–IN 2 OUT
1 7 2
+ – + –
+IN 1 3 6 –IN 2
–V CC 4 5 +IN 2
* All voltage are measured with a 10M Ω /V DC electric volt meter.
* Components having special characteristics are marked Z and
must be replaced with parts having specifications equal to those
originally installed.
* Schematic diagram is subject to change without notice.
O