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A. IF PLL
The IF LO frequency synthesis comprises the four following par is:
- Input buffer: A 13MHz input buffer with DC-biasing provided at source.
- VCO: Operating on 1.52GHz which is 4times the TX-IF frequency (380MHz) and 8 times the RX-IF
(190MHz), this is a fully integrated balanced LC oscillator with on-chip resonator. On-chip
varactor are used to tune the VCO frequency.
- Prescaler
- Phase-detector with charge pump
For maintaining check on the VCO center frequency, the tuning voltage is set to Vcc/2.
External DC blocking capacitors must be used on the IFLO/IFLOBAR signals.
VCCIFVCO
GNDIFVCO
IFLO
IFLOBAR
VTUNEIF
GNDTUIF
PHDIFOUT
Figure 3-8-7. Block Diagram of Frequency Synthesizer Part (IF PLL)
IF PLL
Div 2
PHD
Charge
Pump
- 93 -
3. Technical Brief
IFPLLON
TBIFVCO
TBIFSI
TBIFSO
XO / R
XOBAR / R
R
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