Sony HVR-DR60 Service Manual page 22

3-1. OVERALL BLOCK DIAGRAM (1/2)
HD-035 BOARD (1/2)
CN402
TPB-
3
CN402 8
TPB+
4
TPA-
HDV/DV 5
TPA+
6
7 9
2
24.576MHz
POR-
1.8 INCH HDD
(60GB)
: VIDEO/AUDIO SIGNAL
HVR-DR60
( ) : Number in parenthesis ( ) indicates the division number of schematic diagram where the component is located.
PD
14
CNA
3
IC401
PHY LINK
(4/5)
LD0 - LD7
34
(IEEE 1394)
35
36
LREQ
37 1
CTL0, CTL1
59
PCLK
X401 2
LKON
19
60
2 LPS
LPS
53 15
1
4
SUSPEND
IC402
(4/5)
DA0 - DA12
IC301
SDRAM
64M
(3/5)
DDQ0 - DDQ31
DQM0 - DQM3
#CS
J8
RAS
J9
CAS
K7
#WE
K8
BA0, BA1
CLKE
J2
CLKD
J1
SI
1
SCLK
2
IC503
SRESET-
3
FLASH
SCS-
4
MEMORY
SWE-
(5/5) 5
X503 CLK
6
27MHz
SD
8
CN401
DD0 - DD15
DMARQ
31
#DIOW-
29
#DIOR-
27
IORDY
FP-431
25
#DMACK-
FLEXIBLE BOARD 23
INTRQ
21
DA0 - DA2
#CS0-, #CS1-
HDD_NDASP
13
#RESET
51
#PDTAG
18
08
3. BLOCK DIAGRAMS
E1
E3
F3
IC501
C2
DV SIGNAL PROCESS
B1
(5/5)
D7
PHY LINK
INTERFACE
PD
C6
SUSPEND
B12
CNA
A12
X201
8MHz
SDRAM
INTERFACE
D1
E2
G_ALERT
F2
G1
G4
SUB_S_CNVSS
C1
A17
C9
F18 SUB_TXD
A20
E20 SUB_RXD
C18
C19 I2C_SDA
Y5
E17
I2C_SCL
FLASH ROM
Y4
D19
INTERFACE
L1
D20
5 6
IC202
LCD
EEPROM
(2/5)
SUB_S_RESET
D3
V3
W15
V14
Y15
HDD
W14
INTERFACE
W11
Y11
V10
M19
3-1
CN203
LCD_RESET
15
LCD_CS1
13
LCD_A0
11
LCD_SDA
9
LCD_SCL
7
IC203 EL_OFF
39 5
(1/2)
STOP
55
35 4
SUB-CON REC_ON
20
34 3
(2/5)
LED_ON
21
32 2
ENA
26 17
22
CN201
23
FF
36 2
PLAY
33 3
REW
37 4
REPEAT
38 5
CAM LINK
40 6
AVC_ON
16 8
SBP_ON
17 9
SW_OFF
7
45
18
AOZ
1
AOY
2
AOX
3
STBYB
62
14
15
54
53 VREF
58
61 19
4
IC212
WP
7 (2/5)
1 2
IC203
30
(2/2)
28
SUB-CON
27
(2/5)
25
42
44
46
60
41
31
LC-093 BOARD
CN601
#RES
15
#CS
13
A0
11 ND001
SDA
9
S602
SCL
7 MENU
S601
STOP
S603
REC
5
4
3
D601
2
REC
EL
17
OUT1
5 LND050
IC601
3
OUT2
6 LND051
LCD DRIVE
S706
S702
CN701
PLAY S703
2
S704
3
REPEAT S705
4
CAM LINK
5
6
COMPUTER
8
S701
OFF POWER
9
7 VIDEO
SW-492 BOARD
SE201
3
G-SENSOR
4
(2/5)
5
10
IC213
6
2.5V REG
(2/5)
SW_OFF
POR-
MRESET
A
HD-035
PWR_SUB_33
BOARD (2/2)
PWR_MAIN_33
(PAGE 3-2)
PWR_HDD
PWR_LCD
PWR_P33
DCIN_AD
IB_ENABLE
BATT_AD
SLEEP